From patchwork Tue Oct 13 16:20:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Zapolskiy X-Patchwork-Id: 7386781 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 33A75BEEA4 for ; Tue, 13 Oct 2015 16:23:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 765E920619 for ; Tue, 13 Oct 2015 16:23:00 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1114F207CA for ; Tue, 13 Oct 2015 16:22:59 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zm2K6-0005bp-Tq; Tue, 13 Oct 2015 16:21:10 +0000 Received: from li271-223.members.linode.com ([178.79.152.223] helo=mail.mleia.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zm2K4-0005aQ-R7 for linux-arm-kernel@lists.infradead.org; Tue, 13 Oct 2015 16:21:09 +0000 Received: from mail.mleia.com (localhost [127.0.0.1]) by mail.mleia.com (Postfix) with ESMTP id 4030110FDF9; Tue, 13 Oct 2015 17:29:25 +0100 (BST) From: Vladimir Zapolskiy To: Joachim Eastwood , Roland Stigge , Russell King , Arnd Bergmann , Rob Herring Subject: [PATCH v2 4/5] arm: dts: lpc32xx: add reg property to cpu device node Date: Tue, 13 Oct 2015 19:20:37 +0300 Message-Id: <1444753237-6451-1-git-send-email-vz@mleia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1444694045-22000-5-git-send-email-vz@mleia.com> References: <1444694045-22000-5-git-send-email-vz@mleia.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-49551924 X-CRM114-CacheID: sfid-20151013_172925_286448_6A800FC2 X-CRM114-Status: GOOD ( 13.13 ) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151013_172925_286448_6A800FC2 X-CRM114-Status: UNSURE ( 9.44 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Grant Likely , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP According to device tree bindings for ARM cpus cpu node must contain a reg property for enumeration scheme. The change adds reg = <0x0> indicating that the processor does not have CPU identification register and updates cell settings. Signed-off-by: Vladimir Zapolskiy --- Changes from v1 to v2: - instead of removing address/size cells properties update them in accordance to ARM CPU device tree bindings, thanks to Joachim for review The change replaces 4/5 "arm: dts: lpc32xx: remove unneeded cell settings from cpus" arch/arm/boot/dts/lpc32xx.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi index dcb52cb..343a94f 100644 --- a/arch/arm/boot/dts/lpc32xx.dtsi +++ b/arch/arm/boot/dts/lpc32xx.dtsi @@ -18,12 +18,13 @@ interrupt-parent = <&mic>; cpus { - #address-cells = <0>; + #address-cells = <1>; #size-cells = <0>; - cpu { + cpu@0 { compatible = "arm,arm926ej-s"; device_type = "cpu"; + reg = <0x0>; }; };