From patchwork Sat Oct 17 21:35:56 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Zapolskiy X-Patchwork-Id: 7423621 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0727B9F1D5 for ; Sat, 17 Oct 2015 21:38:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 249C1206EF for ; Sat, 17 Oct 2015 21:38:50 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4214B205EC for ; Sat, 17 Oct 2015 21:38:49 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZnZAO-0001CG-1V; Sat, 17 Oct 2015 21:37:28 +0000 Received: from li271-223.members.linode.com ([178.79.152.223] helo=mail.mleia.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZnZ9j-0000SA-FK for linux-arm-kernel@lists.infradead.org; Sat, 17 Oct 2015 21:36:49 +0000 Received: from mail.mleia.com (localhost [127.0.0.1]) by mail.mleia.com (Postfix) with ESMTP id E9D00110A6F; Sat, 17 Oct 2015 22:44:55 +0100 (BST) From: Vladimir Zapolskiy To: Arnd Bergmann , Rob Herring , Russell King , Roland Stigge Subject: [PATCH v2 7/8] arm: dts: lpc32xx: add device nodes for standard timers Date: Sun, 18 Oct 2015 00:35:56 +0300 Message-Id: <1445117757-8073-8-git-send-email-vz@mleia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1445117757-8073-1-git-send-email-vz@mleia.com> References: <1445117757-8073-1-git-send-email-vz@mleia.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-49551924 X-CRM114-CacheID: sfid-20151017_224455_980700_AFA3DC6A X-CRM114-Status: GOOD ( 10.90 ) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151017_224455_980700_AFA3DC6A X-CRM114-Status: UNSURE ( 8.08 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Grant Likely , devicetree@vger.kernel.org, Joachim Eastwood , linux-arm-kernel@lists.infradead.org, Vladimir Zapolskiy MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Vladimir Zapolskiy NXP LPC32xx SoCs have 6 standard timers, add device nodes to describe them. Signed-off-by: Vladimir Zapolskiy --- Changes from v1 to v2: - none, new change arch/arm/boot/dts/lpc32xx.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi index a595a4b..ba91b20 100644 --- a/arch/arm/boot/dts/lpc32xx.dtsi +++ b/arch/arm/boot/dts/lpc32xx.dtsi @@ -271,11 +271,31 @@ #gpio-cells = <3>; /* bank, pin, flags */ }; + timer4: timer@4002C000 { + compatible = "nxp,lpc3220-timer"; + reg = <0x4002C000 0x1000>; + interrupts = <0x3 0>; + status = "disabled"; + }; + + timer5: timer@40030000 { + compatible = "nxp,lpc3220-timer"; + reg = <0x40030000 0x1000>; + interrupts = <0x4 0>; + status = "disabled"; + }; + watchdog: watchdog@4003C000 { compatible = "nxp,pnx4008-wdt"; reg = <0x4003C000 0x1000>; }; + timer0: timer@40044000 { + compatible = "nxp,lpc3220-timer"; + reg = <0x40044000 0x1000>; + interrupts = <0x10 0>; + }; + /* * TSC vs. ADC: Since those two share the same * hardware, you need to choose from one of the @@ -297,6 +317,12 @@ status = "disabled"; }; + timer1: timer@4004C000 { + compatible = "nxp,lpc3220-timer"; + reg = <0x4004C000 0x1000>; + interrupts = <0x11 0>; + }; + key: key@40050000 { compatible = "nxp,lpc3220-key"; reg = <0x40050000 0x1000>; @@ -304,6 +330,13 @@ status = "disabled"; }; + timer2: timer@40058000 { + compatible = "nxp,lpc3220-timer"; + reg = <0x40058000 0x1000>; + interrupts = <0x12 0>; + status = "disabled"; + }; + pwm1: pwm@4005C000 { compatible = "nxp,lpc3220-pwm"; reg = <0x4005C000 0x4>; @@ -315,6 +348,13 @@ reg = <0x4005C004 0x4>; status = "disabled"; }; + + timer3: timer@40060000 { + compatible = "nxp,lpc3220-timer"; + reg = <0x40060000 0x1000>; + interrupts = <0x13 0>; + status = "disabled"; + }; }; }; };