| Message ID | 1445332264-6054-2-git-send-email-wxt@rock-chips.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt index ef802de..2587f34b 100644 --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt @@ -27,8 +27,9 @@ tsadc: tsadc@ff280000 { clock-names = "tsadc", "apb_pclk"; resets = <&cru SRST_TSADC>; reset-names = "tsadc-apb"; - pinctrl-names = "default"; - pinctrl-0 = <&otp_out>; + pinctrl-names = "default", "otp_out"; + pinctrl-0 = <&otp_gpio>; + pinctrl-1 = <&otp_out>; #thermal-sensor-cells = <1>; rockchip,hw-tshut-temp = <95000>; rockchip,hw-tshut-mode = <0>;
Add the OTP gpio state, we need switch the pin to gpio state before the TSADC controller is reset. Signed-off-by: Caesar Wang <wxt@rock-chips.com> --- Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)