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Signed-off-by: Bhupesh Sharma --- .../devicetree/bindings/watchdog/sp805-wdt.txt | 33 ++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/sp805-wdt.txt diff --git a/Documentation/devicetree/bindings/watchdog/sp805-wdt.txt b/Documentation/devicetree/bindings/watchdog/sp805-wdt.txt new file mode 100644 index 0000000..ec70fe9 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/sp805-wdt.txt @@ -0,0 +1,33 @@ +* ARM SP805 Watchdog Timer (WDT) Controller + +SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that +can be used to identify the peripheral type, vendor, and revision. +This value can be used for driver matching. + +Note that the current sp805_wdt driver relies on the 'drivers/amba/bus.c' +framework to invoke the probe function of the sp805_wdt driver using the +unique PRIMECELL identifiers of the sp805 wdt IP. + +As SP805 WDT is a primecell IP, it follows the base bindings specified in +'arm/primecell.txt' + +Required properties: +- compatible : Should be "arm,sp805-wdt", "arm,primecell" +- reg : Base address and size of the watchdog timer registers. +- interrupts : Should specify WDT interrupt number. + +Optional properties: +- clocks : From common clock binding. First clock is phandle to clock for apb + pclk. Additional clocks are optional. +- clock-names : From common clock binding. Shall be "apb_pclk" for first clock. + +Examples: + + cluster1_core0_watchdog: wdt@c000000 { + compatible = "arm,sp805-wdt", "arm,primecell"; + reg = <0x0 0xc000000 0x0 0x1000>; + interrupts = <1 12 0x8>; /* PPI, Level low type */ + clocks = <&clockgen 4 3>; + clock-names = "apb_pclk"; + }; +