From patchwork Tue Nov 17 14:56:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Carlo Caione X-Patchwork-Id: 7637791 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2B8359F392 for ; Tue, 17 Nov 2015 14:59:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8BE1B2057E for ; Tue, 17 Nov 2015 14:59:47 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 95208205B5 for ; Tue, 17 Nov 2015 14:59:43 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zyhhj-0002xw-Q1; Tue, 17 Nov 2015 14:57:55 +0000 Received: from mail-wm0-x232.google.com ([2a00:1450:400c:c09::232]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZyhhB-0002lb-S4 for linux-arm-kernel@lists.infradead.org; Tue, 17 Nov 2015 14:57:24 +0000 Received: by wmvv187 with SMTP id v187so231661532wmv.1 for ; Tue, 17 Nov 2015 06:57:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=o1eMk3R0L2uqvW605bLyW10acpSXa+aIFVWIvBCsu6U=; b=VeVtj8YAQzytrD3EoMnygWZnUnEoisBn0UIPWg18nCcw/xlmkb8qI7xOLjF9HHInXk FYhAtEN456Cp44ORgkJXej1flAfDgoFRAj08eumDDe6OceMmdfFBwGMJiI+mGiZPgIB7 IsC8HpmMk7weB0mAl3M4TcVbdifqXF4RZV/TvHBgsFP4nYS6/GN4mBo2uHjpzRH2Oud1 PX/mqyoofowhx+mz8/JDwiXo/niUfj5QWUGBHLNMRQrESWsN0HTaA7SBPro/jtsf/xy6 KuURtw5QpOKPstiYK/fjdWw2hiWBlMO50y1B4Tz54SDqM4/R8OcJ7Ro6O/opIL0EtQE/ ayhg== X-Received: by 10.28.54.165 with SMTP id y37mr3436723wmh.55.1447772220186; Tue, 17 Nov 2015 06:57:00 -0800 (PST) Received: from localhost.localdomain ([212.91.95.170]) by smtp.gmail.com with ESMTPSA id b84sm22578986wmh.15.2015.11.17.06.56.59 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 17 Nov 2015 06:56:59 -0800 (PST) From: Carlo Caione To: robh+dt@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mturquette@baylibre.com, linux-clk@vger.kernel.org, linux@arm.linux.org.uk, linux-meson@googlegroups.com, drake@endlessm.com, jerry.cao@amlogic.com, victor.wan@amlogic.com, pawel.moll@arm.com, arnd@arndb.de Subject: [PATCH 2/7] Documentation: bindings: Define CPU reset controller Date: Tue, 17 Nov 2015 15:56:37 +0100 Message-Id: <1447772202-12418-3-git-send-email-carlo@caione.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1447772202-12418-1-git-send-email-carlo@caione.org> References: <1447772202-12418-1-git-send-email-carlo@caione.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151117_065722_226427_20F40A7F X-CRM114-Status: GOOD ( 12.96 ) X-Spam-Score: -2.4 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Carlo Caione MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Carlo Caione The clock controller on Amlogic Meson8b SoCs has been extended with a reset controller used to reset the CPU cores. It is used during SMP bringup. With this patch we extend the clock controller documentation. Signed-off-by: Carlo Caione --- Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt index 2b7b3fa..feeb4de 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt +++ b/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt @@ -1,7 +1,8 @@ * Amlogic Meson8b Clock and Reset Unit The Amlogic Meson8b clock controller generates and supplies clock to various -controllers within the SoC. +controllers within the SoC and also implements a reset controller for the CPU +cores. Required Properties: @@ -13,16 +14,19 @@ Required Properties: mapped region. - #clock-cells: should be 1. +- #reset-cells: should be 1. Each clock is assigned an identifier and client nodes can use this identifier to specify the clock which they consume. All available clocks are defined as preprocessor macros in the dt-bindings/clock/meson8b-clkc.h header and can be used in device tree sources. +Similar identifiers exist for the CPU core reset lines. Example: Clock controller node: clkc: clock-controller@c1104000 { #clock-cells = <1>; + #reset-cells = <1>; compatible = "amlogic,meson8b-clkc"; reg = <0xc1108000 0x4>, <0xc1104000 0x460>; };