From patchwork Fri Nov 20 01:05:06 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Zapolskiy X-Patchwork-Id: 7663231 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 37091BF90C for ; Fri, 20 Nov 2015 01:09:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2C1DC203DC for ; Fri, 20 Nov 2015 01:09:13 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3548520396 for ; Fri, 20 Nov 2015 01:09:12 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZzaAX-00060b-QT; Fri, 20 Nov 2015 01:07:17 +0000 Received: from mleia.com ([178.79.152.223] helo=mail.mleia.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zza9F-0004z3-UV for linux-arm-kernel@lists.infradead.org; Fri, 20 Nov 2015 01:06:05 +0000 Received: from mail.mleia.com (localhost [127.0.0.1]) by mail.mleia.com (Postfix) with ESMTP id A3654116706; Fri, 20 Nov 2015 01:06:34 +0000 (GMT) From: Vladimir Zapolskiy To: Rob Herring , Stephen Boyd , Michael Turquette , Arnd Bergmann Subject: [PATCH 06/11] arm: dts: lpc32xx: add clock properties to device nodes Date: Fri, 20 Nov 2015 03:05:06 +0200 Message-Id: <1447981511-29653-7-git-send-email-vz@mleia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1447981511-29653-1-git-send-email-vz@mleia.com> References: <1447981511-29653-1-git-send-email-vz@mleia.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-49551924 X-CRM114-CacheID: sfid-20151120_010634_692003_732807E6 X-CRM114-Status: GOOD ( 11.37 ) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151120_010634_692003_732807E6 X-CRM114-Status: UNSURE ( 7.81 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.5 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Roland Stigge , devicetree@vger.kernel.org, Russell King , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The change adds clock properties to all described peripheral devices, clock ids are taken from dt-bindings/clock/lpc32xx-clock.h Some existing drivers expect to get clock names, in those cases clock-names are added as well. Signed-off-by: Vladimir Zapolskiy --- arch/arm/boot/dts/lpc32xx.dtsi | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi index 65023c1..792468e 100644 --- a/arch/arm/boot/dts/lpc32xx.dtsi +++ b/arch/arm/boot/dts/lpc32xx.dtsi @@ -13,6 +13,8 @@ #include "skeleton.dtsi" +#include + / { compatible = "nxp,lpc3220"; interrupt-parent = <&mic>; @@ -57,6 +59,7 @@ slc: flash@20020000 { compatible = "nxp,lpc3220-slc"; reg = <0x20020000 0x1000>; + clocks = <&clk LPC32XX_CLK_SLC>; status = "disabled"; }; @@ -64,6 +67,7 @@ compatible = "nxp,lpc3220-mlc"; reg = <0x200a8000 0x11000>; interrupts = <11 0>; + clocks = <&clk LPC32XX_CLK_MLC>; status = "disabled"; }; @@ -71,6 +75,8 @@ compatible = "arm,pl080", "arm,primecell"; reg = <0x31000000 0x1000>; interrupts = <0x1c 0>; + clocks = <&clk LPC32XX_CLK_DMA>; + clock-names = "apb_pclk"; }; usb { @@ -110,6 +116,8 @@ compatible = "arm,pl110", "arm,primecell"; reg = <0x31040000 0x1000>; interrupts = <0x0e 0>; + clocks = <&clk LPC32XX_CLK_LCD>; + clock-names = "apb_pclk"; status = "disabled"; }; @@ -117,11 +125,14 @@ compatible = "nxp,lpc-eth"; reg = <0x31060000 0x1000>; interrupts = <0x1d 0>; + clocks = <&clk LPC32XX_CLK_MAC>; }; emc: memory-controller@31080000 { compatible = "arm,pl175", "arm,primecell"; reg = <0x31080000 0x1000>; + clocks = <&clk LPC32XX_CLK_DDRAM>, <&clk LPC32XX_CLK_DDRAM>; + clock-names = "mpmcclk", "apb_pclk"; #address-cells = <1>; #size-cells = <1>; @@ -142,6 +153,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x20084000 0x1000>; interrupts = <0x14 0>; + clocks = <&clk LPC32XX_CLK_SSP0>; + clock-names = "apb_pclk"; }; spi1: spi@20088000 { @@ -153,6 +166,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x2008c000 0x1000>; interrupts = <0x15 0>; + clocks = <&clk LPC32XX_CLK_SSP1>; + clock-names = "apb_pclk"; }; spi2: spi@20090000 { @@ -169,6 +184,8 @@ compatible = "arm,pl18x", "arm,primecell"; reg = <0x20098000 0x1000>; interrupts = <0x0f 0>, <0x0d 0>; + clocks = <&clk LPC32XX_CLK_SD>; + clock-names = "apb_pclk"; status = "disabled"; }; @@ -185,6 +202,7 @@ interrupts = <9 0>; clock-frequency = <13000000>; reg-shift = <2>; + clocks = <&clk LPC32XX_CLK_UART5>; status = "disabled"; }; @@ -194,6 +212,7 @@ interrupts = <7 0>; clock-frequency = <13000000>; reg-shift = <2>; + clocks = <&clk LPC32XX_CLK_UART3>; status = "disabled"; }; @@ -203,6 +222,7 @@ interrupts = <8 0>; clock-frequency = <13000000>; reg-shift = <2>; + clocks = <&clk LPC32XX_CLK_UART4>; status = "disabled"; }; @@ -212,6 +232,7 @@ interrupts = <10 0>; clock-frequency = <13000000>; reg-shift = <2>; + clocks = <&clk LPC32XX_CLK_UART6>; status = "disabled"; }; @@ -222,6 +243,7 @@ #address-cells = <1>; #size-cells = <0>; pnx,timeout = <0x64>; + clocks = <&clk LPC32XX_CLK_I2C1>; }; i2c2: i2c@400A8000 { @@ -231,6 +253,7 @@ #address-cells = <1>; #size-cells = <0>; pnx,timeout = <0x64>; + clocks = <&clk LPC32XX_CLK_I2C2>; }; mpwm: mpwm@400E8000 { @@ -302,6 +325,7 @@ compatible = "nxp,lpc3220-rtc"; reg = <0x40024000 0x1000>; interrupts = <0x34 0>; + clocks = <&clk LPC32XX_CLK_RTC>; }; gpio: gpio@40028000 { @@ -315,6 +339,8 @@ compatible = "nxp,lpc3220-timer"; reg = <0x4002C000 0x1000>; interrupts = <0x3 0>; + clocks = <&clk LPC32XX_CLK_TIMER4>; + clock-names = "timerclk"; status = "disabled"; }; @@ -322,17 +348,22 @@ compatible = "nxp,lpc3220-timer"; reg = <0x40030000 0x1000>; interrupts = <0x4 0>; + clocks = <&clk LPC32XX_CLK_TIMER5>; + clock-names = "timerclk"; status = "disabled"; }; watchdog: watchdog@4003C000 { compatible = "nxp,pnx4008-wdt"; reg = <0x4003C000 0x1000>; + clocks = <&clk LPC32XX_CLK_WDOG>; }; timer0: timer@40044000 { compatible = "nxp,lpc3220-timer"; reg = <0x40044000 0x1000>; + clocks = <&clk LPC32XX_CLK_TIMER0>; + clock-names = "timerclk"; interrupts = <0x10 0>; }; @@ -347,6 +378,7 @@ compatible = "nxp,lpc3220-adc"; reg = <0x40048000 0x1000>; interrupts = <0x27 0>; + clocks = <&clk LPC32XX_CLK_ADC>; status = "disabled"; }; @@ -354,6 +386,7 @@ compatible = "nxp,lpc3220-tsc"; reg = <0x40048000 0x1000>; interrupts = <0x27 0>; + clocks = <&clk LPC32XX_CLK_ADC>; status = "disabled"; }; @@ -361,6 +394,8 @@ compatible = "nxp,lpc3220-timer"; reg = <0x4004C000 0x1000>; interrupts = <0x11 0>; + clocks = <&clk LPC32XX_CLK_TIMER1>; + clock-names = "timerclk"; }; key: key@40050000 { @@ -374,18 +409,22 @@ compatible = "nxp,lpc3220-timer"; reg = <0x40058000 0x1000>; interrupts = <0x12 0>; + clocks = <&clk LPC32XX_CLK_TIMER2>; + clock-names = "timerclk"; status = "disabled"; }; pwm1: pwm@4005C000 { compatible = "nxp,lpc3220-pwm"; reg = <0x4005C000 0x4>; + clocks = <&clk LPC32XX_CLK_PWM1>; status = "disabled"; }; pwm2: pwm@4005C004 { compatible = "nxp,lpc3220-pwm"; reg = <0x4005C004 0x4>; + clocks = <&clk LPC32XX_CLK_PWM2>; status = "disabled"; }; @@ -393,6 +432,8 @@ compatible = "nxp,lpc3220-timer"; reg = <0x40060000 0x1000>; interrupts = <0x13 0>; + clocks = <&clk LPC32XX_CLK_TIMER3>; + clock-names = "timerclk"; status = "disabled"; }; };