From patchwork Fri Nov 20 01:05:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Zapolskiy X-Patchwork-Id: 7663391 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 442309F2EC for ; Fri, 20 Nov 2015 01:20:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 75A9D2046F for ; Fri, 20 Nov 2015 01:20:30 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A7B7520320 for ; Fri, 20 Nov 2015 01:20:29 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZzaLS-0002Ck-Js; Fri, 20 Nov 2015 01:18:34 +0000 Received: from mleia.com ([178.79.152.223] helo=mail.mleia.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zza9F-0004z5-UX for linux-arm-kernel@lists.infradead.org; Fri, 20 Nov 2015 01:06:00 +0000 Received: from mail.mleia.com (localhost [127.0.0.1]) by mail.mleia.com (Postfix) with ESMTP id 3B24E11670B; Fri, 20 Nov 2015 01:06:35 +0000 (GMT) From: Vladimir Zapolskiy To: Rob Herring , Stephen Boyd , Michael Turquette , Arnd Bergmann Subject: [PATCH 07/11] arm: dts: lpc32xx: add USB clock controller Date: Fri, 20 Nov 2015 03:05:07 +0200 Message-Id: <1447981511-29653-8-git-send-email-vz@mleia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1447981511-29653-1-git-send-email-vz@mleia.com> References: <1447981511-29653-1-git-send-email-vz@mleia.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-49551924 X-CRM114-CacheID: sfid-20151120_010635_264530_66AD0D6A X-CRM114-Status: GOOD ( 11.33 ) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151120_010635_264530_66AD0D6A X-CRM114-Status: UNSURE ( 7.76 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.5 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Roland Stigge , devicetree@vger.kernel.org, Russell King , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The change adds device node of LPC32xx USB clock controller and adds clock properties to USB OHCI, USB device and I2C controller to USB phy device nodes. Signed-off-by: Vladimir Zapolskiy --- arch/arm/boot/dts/lpc32xx.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi index 792468e..68bf011 100644 --- a/arch/arm/boot/dts/lpc32xx.dtsi +++ b/arch/arm/boot/dts/lpc32xx.dtsi @@ -92,6 +92,7 @@ compatible = "nxp,ohci-nxp", "usb-ohci"; reg = <0x0 0x300>; interrupts = <0x3b 0>; + clocks = <&usbclk LPC32XX_USB_CLK_HOST>; status = "disabled"; }; @@ -99,6 +100,7 @@ compatible = "nxp,lpc3220-udc"; reg = <0x0 0x300>; interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>; + clocks = <&usbclk LPC32XX_USB_CLK_DEVICE>; status = "disabled"; }; @@ -106,10 +108,17 @@ compatible = "nxp,pnx-i2c"; reg = <0x300 0x100>; interrupts = <0x3f 0>; + clocks = <&usbclk LPC32XX_USB_CLK_I2C>; #address-cells = <1>; #size-cells = <0>; pnx,timeout = <0x64>; }; + + usbclk: clock-controller@F00 { + compatible = "nxp,lpc3220-usb-clk"; + reg = <0xF00 0x100>; + #clock-cells = <1>; + }; }; clcd: clcd@31040000 {