From patchwork Fri Nov 20 17:22:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 7670401 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6FD5ABF90C for ; Fri, 20 Nov 2015 17:24:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7146E20425 for ; Fri, 20 Nov 2015 17:24:56 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 66A2520416 for ; Fri, 20 Nov 2015 17:24:55 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZzpOt-0005Xs-6K; Fri, 20 Nov 2015 17:23:07 +0000 Received: from devils.ext.ti.com ([198.47.26.153]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZzpOf-0005MW-KL for linux-arm-kernel@lists.infradead.org; Fri, 20 Nov 2015 17:22:55 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id tAKHMDaA009535; Fri, 20 Nov 2015 11:22:13 -0600 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id tAKHMDQG031032; Fri, 20 Nov 2015 11:22:13 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.224.2; Fri, 20 Nov 2015 11:22:13 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id tAKHMCLA019751; Fri, 20 Nov 2015 11:22:13 -0600 From: Grygorii Strashko To: , Daniel Lezcano , Thomas Gleixner , Tony Lindgren Subject: [RFC PATCH] clocksource: ti-32k: convert to platform device Date: Fri, 20 Nov 2015 19:22:09 +0200 Message-ID: <1448040129-23869-1-git-send-email-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.6.3 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151120_092253_985072_73E09B19 X-CRM114-Status: GOOD ( 16.00 ) X-Spam-Score: -7.5 (-------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Grygorii Strashko , linux-omap@vger.kernel.org, Felipe Balbi , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since system clocksource is finally selected by Clocksource core at fs_initcall stage during boot there are no reasons to initialize ti_32k_timer at early boot stages. Hence, ti_32k_timer can be converted to use platform device/driver model and its PM can be implemented using PM runtime which is common for OMAP devices. Platform specific initialization code has to be disabled once as ti_32k_timer is converted to platform device - otherwise OMAP platform code will generate boot warnings. After this change, all counter_32k's platform code can be removed once all OMAP boards will be converted to DT. Cc: Tony Lindgren Cc: Felipe Balbi Signed-off-by: Grygorii Strashko --- arch/arm/mach-omap2/timer.c | 16 +++-------- drivers/clocksource/timer-ti-32k.c | 58 ++++++++++++++++++++++++++++++++------ 2 files changed, 53 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index b18ebbe..3bfde44 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -393,23 +393,15 @@ static const struct of_device_id omap_counter_match[] __initconst = { static int __init __maybe_unused omap2_sync32k_clocksource_init(void) { int ret; - struct device_node *np = NULL; struct omap_hwmod *oh; const char *oh_name = "counter_32k"; /* - * If device-tree is present, then search the DT blob - * to see if the 32kHz counter is supported. + * If device-tree is present, then just exit - + * 32kHz clocksource driver will handle it. */ - if (of_have_populated_dt()) { - np = omap_get_timer_dt(omap_counter_match, NULL); - if (!np) - return -ENODEV; - - of_property_read_string_index(np, "ti,hwmods", 0, &oh_name); - if (!oh_name) - return -ENODEV; - } + if (of_have_populated_dt()) + return 0; /* * First check hwmod data is available for sync32k counter diff --git a/drivers/clocksource/timer-ti-32k.c b/drivers/clocksource/timer-ti-32k.c index 8518d9d..e71496f 100644 --- a/drivers/clocksource/timer-ti-32k.c +++ b/drivers/clocksource/timer-ti-32k.c @@ -39,8 +39,11 @@ #include #include #include +#include #include #include +#include +#include /* * 32KHz clocksource ... always available, on pretty most chips except @@ -88,15 +91,28 @@ static u64 notrace omap_32k_read_sched_clock(void) return ti_32k_read_cycles(&ti_32k_timer.cs); } -static void __init ti_32k_timer_init(struct device_node *np) +static const struct of_device_id ti_32k_of_table[] = { + { .compatible = "ti,omap-counter32k" }, + { } +}; +MODULE_DEVICE_TABLE(of, ti_32k_of_table); + +static int __init ti_32k_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; + struct resource *res; int ret; - ti_32k_timer.base = of_iomap(np, 0); - if (!ti_32k_timer.base) { - pr_err("Can't ioremap 32k timer base\n"); - return; - } + /* Static mapping, never released */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + ti_32k_timer.base = devm_ioremap_resource(dev, res); + if (IS_ERR(ti_32k_timer.base)) + return PTR_ERR(ti_32k_timer.base); + + pm_runtime_enable(dev); + ret = pm_runtime_get_sync(dev); + if (ret < 0) + goto probe_err; ti_32k_timer.counter = ti_32k_timer.base; @@ -116,11 +132,35 @@ static void __init ti_32k_timer_init(struct device_node *np) ret = clocksource_register_hz(&ti_32k_timer.cs, 32768); if (ret) { pr_err("32k_counter: can't register clocksource\n"); - return; + goto probe_err; } sched_clock_register(omap_32k_read_sched_clock, 32, 32768); pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n"); + return 0; + +probe_err: + pm_runtime_put_noidle(dev); + return ret; +}; + +static struct platform_driver ti_32k_driver __initdata = { + .probe = ti_32k_probe, + .driver = { + .name = "ti_32k_timer", + .of_match_table = of_match_ptr(ti_32k_of_table), + } +}; + +static int __init ti_32k_init(void) +{ + return platform_driver_register(&ti_32k_driver); } -CLOCKSOURCE_OF_DECLARE(ti_32k_timer, "ti,omap-counter32k", - ti_32k_timer_init); + +subsys_initcall(ti_32k_init); + +MODULE_AUTHOR("Paul Mundt"); +MODULE_AUTHOR("Juha Yrjölä"); +MODULE_DESCRIPTION("OMAP2 32k Timer"); +MODULE_ALIAS("platform:ti_32k_timer"); +MODULE_LICENSE("GPL v2");