[1/3] i2c: at91: add setting HOLD field of TWIHS_CWGR via DT

Commit Message

Ludovic Desroches Nov. 24, 2015, 1:47 p.m. UTC

From: Wenyou Yang <[e-mail]>

Add the HOLD field management. Some i2c devices need a longer data hold
time than the one given in the i2c bus specification. Since this value
depends on the i2c device connected to the bus, add a DT property to
configure it: "atmel,twd-hold-cycles".

Signed-off-by: Wenyou Yang <[e-mail]>
Signed-off-by: Ludovic Desroches <[e-mail]>
---
 drivers/i2c/busses/i2c-at91.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

Comments

Wolfram Sang Nov. 30, 2015, 3:13 p.m. UTC | #1

On Tue, Nov 24, 2015 at 02:47:40PM +0100, Ludovic Desroches wrote:
> From: Wenyou Yang <[e-mail]>
> 
> Add the HOLD field management. Some i2c devices need a longer data hold
> time than the one given in the i2c bus specification. Since this value
> depends on the i2c device connected to the bus, add a DT property to
> configure it: "atmel,twd-hold-cycles".

We already have "i2c-sda-hold-time-ns". Can you use that one? Sorry that
this is not obviously documented, I am working on it...

Ludovic Desroches Nov. 30, 2015, 3:57 p.m. UTC | #2

On Mon, Nov 30, 2015 at 04:13:20PM +0100, Wolfram Sang wrote:
> On Tue, Nov 24, 2015 at 02:47:40PM +0100, Ludovic Desroches wrote:
> > From: Wenyou Yang <[e-mail]>
> > 
> > Add the HOLD field management. Some i2c devices need a longer data hold
> > time than the one given in the i2c bus specification. Since this value
> > depends on the i2c device connected to the bus, add a DT property to
> > configure it: "atmel,twd-hold-cycles".
> 
> We already have "i2c-sda-hold-time-ns". Can you use that one? Sorry that
> this is not obviously documented, I am working on it...
> 

I think we can use it, I'll rework the patch to convert duration in
number of cycles.

Patch

diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index 10835d1..b3595ea 100644
--- a/drivers/i2c/busses/i2c-at91.c
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -64,6 +64,7 @@ 
 #define	AT91_TWI_IADR		0x000c	/* Internal Address Register */
 
 #define	AT91_TWI_CWGR		0x0010	/* Clock Waveform Generator Reg */
+#define	AT91_TWI_CWGR_HOLD(x)	(((x) & 0x1f) << 24)
 
 #define	AT91_TWI_SR		0x0020	/* Status Register */
 #define	AT91_TWI_TXCOMP		BIT(0)	/* Transmission Complete */
@@ -185,7 +186,8 @@  static void at91_init_twi_bus(struct at91_twi_dev *dev)
  * Calculate symmetric clock as stated in datasheet:
  * twi_clk = F_MAIN / (2 * (cdiv * (1 << ckdiv) + offset))
  */
-static void at91_calc_twi_clock(struct at91_twi_dev *dev, int twi_clk)
+static void at91_calc_twi_clock(struct at91_twi_dev *dev,
+				int twi_clk, u32 twd_hold)
 {
 	int ckdiv, cdiv, div;
 	struct at91_twi_pdata *pdata = dev->pdata;
@@ -204,7 +206,9 @@  static void at91_calc_twi_clock(struct at91_twi_dev *dev, int twi_clk)
 		cdiv = 255;
 	}
 
-	dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv;
+	dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv
+			    | AT91_TWI_CWGR_HOLD(twd_hold);
+
 	dev_dbg(dev->dev, "cdiv %d ckdiv %d\n", cdiv, ckdiv);
 }
 
@@ -994,6 +998,7 @@  static int at91_twi_probe(struct platform_device *pdev)
 	int rc;
 	u32 phy_addr;
 	u32 bus_clk_rate;
+	u32 twd_hold_cycles = 0;
 
 	dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
 	if (!dev)
@@ -1050,7 +1055,10 @@  static int at91_twi_probe(struct platform_device *pdev)
 	if (rc)
 		bus_clk_rate = DEFAULT_TWI_CLK_HZ;
 
-	at91_calc_twi_clock(dev, bus_clk_rate);
+	of_property_read_u32(dev->dev->of_node, "atmel,twd-hold-cycles",
+			     &twd_hold_cycles);
+
+	at91_calc_twi_clock(dev, bus_clk_rate, twd_hold_cycles);
 	at91_init_twi_bus(dev);
 
 	snprintf(dev->adapter.name, sizeof(dev->adapter.name), "AT91");