From patchwork Thu Dec 3 13:35:20 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanimir Varbanov X-Patchwork-Id: 7760021 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 24A00BEEE1 for ; Thu, 3 Dec 2015 13:38:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2B1542050E for ; Thu, 3 Dec 2015 13:38:33 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5C40420513 for ; Thu, 3 Dec 2015 13:38:32 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a4U3j-0003ST-3W; Thu, 03 Dec 2015 13:36:31 +0000 Received: from mail-wm0-x231.google.com ([2a00:1450:400c:c09::231]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1a4U3f-0003La-U0 for linux-arm-kernel@lists.infradead.org; Thu, 03 Dec 2015 13:36:28 +0000 Received: by wmvv187 with SMTP id v187so27476434wmv.1 for ; Thu, 03 Dec 2015 05:36:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=l/x4p9Z44XCo1m9efhsGwHBvJXCDFXJ/Qy9fga1I1+A=; b=vPc3vbupvPzeZKqHSKEei0OfF1aYRrT3wkkZ7PmMZ4qT+m1zl/oQ37qLiEq5ndAAsh f+wc4xo2tU4JImnAq/lLSYoXYoRQCNA7vm3cQq7UKIwM+ZThfD/gz36+TTYfV2pkVzxw Y6Lmmb9tmF9x/PrWadqKzHFZKDQZX4CQkF8fAvGImJu9JNmxZ1LAtUBii4s2jYJ+sH3v TNHnXHC/LvX05jhgPLCsUlhlE8ldNEk2RFbTZL6aDIyZlKg9OGiS82soOYwvsP5RqJWB +jsXqB9CscFLRGKpFirtrps7WONOdlJWDZ5TuNka5FCpYZi/jI8hmD7rue+gXzKrPW+W j/Dg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=l/x4p9Z44XCo1m9efhsGwHBvJXCDFXJ/Qy9fga1I1+A=; b=grz2oxh3bJjSb99mKcZyQd/D9G6zf0cBHBedZGp0hpG5kM8S4osO8DcBQ5bjh9fp3/ FWzOr1twet7R+JBbjeHgh7fKzo55Lw6z+CxPhj64sXMtOwZAVaW3lHTq5hq8HB/psfVC Xhaq7KG0bEvmAy1DnUKOZg+zuCmpEYn2ps0SiU3IXVAQRRxTq6CvgW348DrimLsxzvyf giixZ6IsZE/j+Z9mYV41vUqHRHENzCqgZak5fxfxQA06iWph+cfcWa2NqTTgEkzCbqWp XrPInxEc6qL9CbOKsR1dpRNBZnqQgV1AuDaEKZddiypBw5fGLW5hjsokJD3SQp/NVnTP +5oA== X-Gm-Message-State: ALoCoQmDGF7rDpauzX9abQ1AHCIOD3ttXmgN3IDtsBCRIyOQjyYL2Xrze+eTpb4ItjgcSSosQoox X-Received: by 10.28.143.11 with SMTP id r11mr52381823wmd.28.1449149766434; Thu, 03 Dec 2015 05:36:06 -0800 (PST) Received: from mms734.qualcomm.mm-sol.com ([37.157.136.206]) by smtp.gmail.com with ESMTPSA id h189sm35769187wme.1.2015.12.03.05.36.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 Dec 2015 05:36:05 -0800 (PST) From: Stanimir Varbanov To: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, Bjorn Helgaas Subject: [PATCH v4 1/5] PCI: designware: add memory barrier after enabling region Date: Thu, 3 Dec 2015 15:35:20 +0200 Message-Id: <1449149725-27607-2-git-send-email-stanimir.varbanov@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1449149725-27607-1-git-send-email-stanimir.varbanov@linaro.org> References: <1449149725-27607-1-git-send-email-stanimir.varbanov@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151203_053628_135983_90C2AFDC X-CRM114-Status: GOOD ( 12.67 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Arnd Bergmann , Pawel Moll , Ian Campbell , Jingoo Han , Pratyush Anand , Stanimir Varbanov , Rob Herring , Srinivas Kandagatla , Bjorn Andersson MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add 'write memory' barrier after enable region in PCIE_ATU_CR2 register. The barrier is needed to ensure that the region enable request has been reached it's destination at time when we read/write to PCI configuration space. Without this barrier PCI device enumeration during kernel boot is not reliable, and reading configuration space for particular PCI device on the bus returns zero aka no device. Signed-off-by: Stanimir Varbanov --- drivers/pci/host/pcie-designware.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c index 02a7452bdf23..ed4dc2e2553b 100644 --- a/drivers/pci/host/pcie-designware.c +++ b/drivers/pci/host/pcie-designware.c @@ -164,6 +164,11 @@ static void dw_pcie_prog_outbound_atu(struct pcie_port *pp, int index, dw_pcie_writel_rc(pp, upper_32_bits(pci_addr), PCIE_ATU_UPPER_TARGET); dw_pcie_writel_rc(pp, type, PCIE_ATU_CR1); dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); + /* + * ensure that the ATU enable has been happaned before accessing + * pci configuration/io spaces through dw_pcie_cfg_[read|write]. + */ + wmb(); } static struct irq_chip dw_msi_irq_chip = {