Message ID | 1449321407-4531-7-git-send-email-wens@csie.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Sat, Dec 05, 2015 at 09:16:47PM +0800, Chen-Yu Tsai wrote: > The video engine has its own module clock, which also includes a > reset control for it. > > Signed-off-by: Chen-Yu Tsai <wens@csie.org> Applied, thanks! Maxime
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 21169c0a6627..0940a788f824 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -527,6 +527,15 @@ "dram_de_mp", "dram_ace"; }; + ve_clk: clk@01c2013c { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-ve-clk"; + reg = <0x01c2013c 0x4>; + clocks = <&pll4>; + clock-output-names = "ve"; + }; + codec_clk: clk@01c20140 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-codec-clk";
The video engine has its own module clock, which also includes a reset control for it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- arch/arm/boot/dts/sun7i-a20.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)