From patchwork Wed Dec 16 08:27:17 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 7860261 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A5F4CBEEE1 for ; Wed, 16 Dec 2015 08:29:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BAE402021B for ; Wed, 16 Dec 2015 08:29:49 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C38912020F for ; Wed, 16 Dec 2015 08:29:48 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a97RX-0002JO-St; Wed, 16 Dec 2015 08:28:15 +0000 Received: from mail-pf0-f194.google.com ([209.85.192.194]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1a97RF-0002CT-E6 for linux-arm-kernel@lists.infradead.org; Wed, 16 Dec 2015 08:27:58 +0000 Received: by mail-pf0-f194.google.com with SMTP id e66so979056pfe.0 for ; Wed, 16 Dec 2015 00:27:37 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=i9mW3F03HWTdUWJEEX0DrA0BOO/mYDz5RY9wc3jmNNw=; b=XlxZgkAu8nIOJUoke6SZnRLC5hmq0HnLWpNmB3fBezkyP44DxGa7FviLgZTfkG31Ky zbkm1uUiM6ICkjF8zZ40OJNO4lj0X4wAjTZKhLbAUPuNhSv+eTRFLrGr5++N3K506lQ1 bnGirAe+ksFBASVCsWIwCgOjluWAvtj4ptaIiEjbuaGjm1W/KWPOrJh5kcKJyeP2N0GS I5xQALKgFYytBmyjF8BkCDXA5co6KRvvhVnvnG98HLvVS4thHdjOVmS+6ehjj1kNDWG/ 4gQ8rNCtknUObazWFeBrUmmJ1b7DJ1d3diortaNcA9psi7QSul3tbJVHXyJPxgfkKPb0 HA/Q== X-Received: by 10.98.69.7 with SMTP id s7mr3484300pfa.45.1450254456573; Wed, 16 Dec 2015 00:27:36 -0800 (PST) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id ix2sm7325676pac.15.2015.12.16.00.27.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 16 Dec 2015 00:27:35 -0800 (PST) From: Caesar Wang To: heiko@sntech.de, mturquette@baylibre.com, sboyd@codeaurora.org Subject: [PATCH 1/5] clk: rockchip: rk3036: include downstream muxes into fractional dividers Date: Wed, 16 Dec 2015 16:27:17 +0800 Message-Id: <1450254441-3243-2-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1450254441-3243-1-git-send-email-wxt@rock-chips.com> References: <1450254441-3243-1-git-send-email-wxt@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151216_002757_519832_F143F80C X-CRM114-Status: UNSURE ( 9.81 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Xing Zheng , linux-kernel@vger.kernel.org, leecam@google.com, leozwang@google.com, keescook@google.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Caesar Wang MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Use the newly introduced possibility to combine the fractional dividers with their downstream muxes for all fractional dividers on currently supported RK3036 SoCs. Signed-off-by: Xing Zheng Signed-off-by: Caesar Wang --- drivers/clk/rockchip/clk-rk3036.c | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c index 75553af..dc01a2a 100644 --- a/drivers/clk/rockchip/clk-rk3036.c +++ b/drivers/clk/rockchip/clk-rk3036.c @@ -227,21 +227,21 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = { COMPOSITE_NOMUX(0, "uart2_src", "uart_pll_clk", 0, RK2928_CLKSEL_CON(13), 0, 7, DFLAGS, RK2928_CLKGATE_CON(1), 8, GFLAGS), - COMPOSITE_FRAC(0, "uart0_frac", "uart0_src", CLK_SET_RATE_PARENT, + COMPOSITE_FRACMUX(0, "uart0_frac", "uart0_src", CLK_SET_RATE_PARENT, RK2928_CLKSEL_CON(17), 0, - RK2928_CLKGATE_CON(1), 9, GFLAGS), - COMPOSITE_FRAC(0, "uart1_frac", "uart1_src", CLK_SET_RATE_PARENT, - RK2928_CLKSEL_CON(18), 0, - RK2928_CLKGATE_CON(1), 11, GFLAGS), - COMPOSITE_FRAC(0, "uart2_frac", "uart2_src", CLK_SET_RATE_PARENT, - RK2928_CLKSEL_CON(19), 0, - RK2928_CLKGATE_CON(1), 13, GFLAGS), + RK2928_CLKGATE_CON(1), 9, GFLAGS, MUX(SCLK_UART0, "sclk_uart0", mux_uart0_p, CLK_SET_RATE_PARENT, - RK2928_CLKSEL_CON(13), 8, 2, MFLAGS), + RK2928_CLKSEL_CON(13), 8, 2, MFLAGS)), + COMPOSITE_FRACMUX(0, "uart1_frac", "uart1_src", CLK_SET_RATE_PARENT, + RK2928_CLKSEL_CON(18), 0, + RK2928_CLKGATE_CON(1), 11, GFLAGS, MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT, - RK2928_CLKSEL_CON(14), 8, 2, MFLAGS), + RK2928_CLKSEL_CON(14), 8, 2, MFLAGS)), + COMPOSITE_FRACMUX(0, "uart2_frac", "uart2_src", CLK_SET_RATE_PARENT, + RK2928_CLKSEL_CON(19), 0, + RK2928_CLKGATE_CON(1), 13, GFLAGS, MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT, - RK2928_CLKSEL_CON(15), 8, 2, MFLAGS), + RK2928_CLKSEL_CON(15), 8, 2, MFLAGS)), COMPOSITE(0, "aclk_vcodec", mux_pll_src_3plls_p, 0, RK2928_CLKSEL_CON(32), 14, 2, MFLAGS, 8, 5, DFLAGS, @@ -289,11 +289,11 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = { COMPOSITE(0, "i2s_src", mux_pll_src_3plls_p, 0, RK2928_CLKSEL_CON(3), 14, 2, MFLAGS, 0, 7, DFLAGS, RK2928_CLKGATE_CON(0), 9, GFLAGS), - COMPOSITE_FRAC(0, "i2s_frac", "i2s_src", CLK_SET_RATE_PARENT, + COMPOSITE_FRACMUX(0, "i2s_frac", "i2s_src", CLK_SET_RATE_PARENT, RK2928_CLKSEL_CON(7), 0, - RK2928_CLKGATE_CON(0), 10, GFLAGS), + RK2928_CLKGATE_CON(0), 10, GFLAGS, MUX(0, "i2s_pre", mux_i2s_pre_p, CLK_SET_RATE_PARENT, - RK2928_CLKSEL_CON(3), 8, 2, MFLAGS), + RK2928_CLKSEL_CON(3), 8, 2, MFLAGS)), COMPOSITE_NODIV(SCLK_I2S_OUT, "i2s_clkout", mux_i2s_clkout_p, 0, RK2928_CLKSEL_CON(3), 12, 1, MFLAGS, RK2928_CLKGATE_CON(0), 13, GFLAGS), @@ -303,11 +303,11 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = { COMPOSITE(0, "spdif_src", mux_pll_src_3plls_p, 0, RK2928_CLKSEL_CON(5), 10, 2, MFLAGS, 0, 7, DFLAGS, RK2928_CLKGATE_CON(2), 10, GFLAGS), - COMPOSITE_FRAC(0, "spdif_frac", "spdif_src", 0, + COMPOSITE_FRACMUX(0, "spdif_frac", "spdif_src", 0, RK2928_CLKSEL_CON(9), 0, - RK2928_CLKGATE_CON(2), 12, GFLAGS), + RK2928_CLKGATE_CON(2), 12, GFLAGS, MUX(SCLK_SPDIF, "sclk_spdif", mux_spdif_p, 0, - RK2928_CLKSEL_CON(5), 8, 2, MFLAGS), + RK2928_CLKSEL_CON(5), 8, 2, MFLAGS)), GATE(SCLK_OTGPHY0, "sclk_otgphy0", "xin12m", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(1), 5, GFLAGS), @@ -414,6 +414,7 @@ static const char *const rk3036_critical_clocks[] __initconst = { "aclk_peri", "hclk_peri", "pclk_peri", + "uart_pll_clk", }; static void __init rk3036_clk_init(struct device_node *np)