| Message ID | 1452580473-10073-1-git-send-email-andi.shyti@samsung.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, 2016-01-12 at 15:34 +0900, Andi Shyti wrote: > In some architectures the L2 cache controller is integrated in the > processor's block itself and it doesn't use any external cache > controller. This means that an entry in the board's dtb related > to the l2c is not necessary. > > Distinguish between error codes and print just an information in > case of -ENODEV. trivia: > diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c [] > @@ -95,7 +95,9 @@ void __init init_IRQ(void) > outer_cache.write_sec = machine_desc->l2c_write_sec; > ret = l2x0_of_init(machine_desc->l2c_aux_val, > machine_desc->l2c_aux_mask); > - if (ret) > + if (ret == -ENODEV) > + pr_info("no L2C controller entry found in the dtb\n"); Perhaps this would be more consistent if it was pr_info("L2C: no controller entry found in the dtb\n"); > > + else if (ret) > pr_err("L2C: failed to init: %d\n", ret); > } >
Hello, On 2016-01-12 08:11, Joe Perches wrote: > On Tue, 2016-01-12 at 15:34 +0900, Andi Shyti wrote: >> In some architectures the L2 cache controller is integrated in the >> processor's block itself and it doesn't use any external cache >> controller. This means that an entry in the board's dtb related >> to the l2c is not necessary. >> >> Distinguish between error codes and print just an information in >> case of -ENODEV. > trivia: > >> diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c > [] >> @@ -95,7 +95,9 @@ void __init init_IRQ(void) >> outer_cache.write_sec = machine_desc->l2c_write_sec; >> ret = l2x0_of_init(machine_desc->l2c_aux_val, >> machine_desc->l2c_aux_mask); >> - if (ret) >> + if (ret == -ENODEV) >> + pr_info("no L2C controller entry found in the dtb\n"); > Perhaps this would be more consistent if it was > pr_info("L2C: no controller entry found in the dtb\n"); Frankly I see no benefit of such message. It still might confuse users that there is something wrong with your DT. When driver initialization fails with -ENODEV, then no message is usually displayed. >> + else if (ret) >> pr_err("L2C: failed to init: %d\n", ret); >> } >> > > Best regards
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 1d45320..abe1ad8 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -95,7 +95,9 @@ void __init init_IRQ(void) outer_cache.write_sec = machine_desc->l2c_write_sec; ret = l2x0_of_init(machine_desc->l2c_aux_val, machine_desc->l2c_aux_mask); - if (ret) + if (ret == -ENODEV) + pr_info("no L2C controller entry found in the dtb\n"); + else if (ret) pr_err("L2C: failed to init: %d\n", ret); }
In some architectures the L2 cache controller is integrated in the processor's block itself and it doesn't use any external cache controller. This means that an entry in the board's dtb related to the l2c is not necessary. Distinguish between error codes and print just an information in case of -ENODEV. This patch converts the following error message: L2C: failed to init: -19 to the following info: no L2C controller entry found in the dtb on boards like odroid-xu4, cortex A7/A15, which don't have external cache controller. Signed-off-by: Andi Shyti <andi.shyti@samsung.com> Reported-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> --- arch/arm/kernel/irq.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)