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[80.11.198.90]) by smtp.gmail.com with ESMTPSA id ct2sm1388885wjb.46.2016.01.26.05.13.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 26 Jan 2016 05:13:43 -0800 (PST) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, alex.williamson@redhat.com, will.deacon@arm.com, christoffer.dall@linaro.org, marc.zyngier@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Subject: [PATCH 09/10] vfio-pci: create an iommu mapping for msi address Date: Tue, 26 Jan 2016 13:12:47 +0000 Message-Id: <1453813968-2024-10-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1453813968-2024-1-git-send-email-eric.auger@linaro.org> References: <1453813968-2024-1-git-send-email-eric.auger@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160126_051407_009147_AEE8FE07 X-CRM114-Status: GOOD ( 18.26 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@linaro.org, p.fedin@samsung.com, linux-kernel@vger.kernel.org, Bharat.Bhushan@freescale.com, iommu@lists.linux-foundation.org, pranav.sawargaonkar@gmail.com, suravee.suthikulpanit@amd.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some platforms require the MSI address programmed in the PCI device to be an IOVA and not a host physical address. This is typically the case for ARM and PowerPC, as opposed to x86. This patch allocates an IOVA page and maps it onto the physical page which contains the target MSI write transaction address. In case an IOMMU binding already exists between those 2, simply reprogram the device. The binding is destroyed by the VFIO IOMMU backend. Signed-off-by: Bharat Bhushan Signed-off-by: Eric Auger --- --- drivers/vfio/pci/vfio_pci_intrs.c | 73 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 68 insertions(+), 5 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c index 3b3ba15..bac24c9 100644 --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -305,6 +305,57 @@ static int vfio_msi_enable(struct vfio_pci_device *vdev, int nvec, bool msix) return 0; } +/** + * vfio_set_mapped_msi_addr: overwrites the msi physical address with an iova + * + * @pdev: vfio pci device handle + * @irq: irq linux number + * returns 0 upon success, < 0 on failure + */ +static int vfio_set_mapped_msi_addr(struct vfio_pci_device *vdev, int irq) +{ + phys_addr_t msi_addr; + dma_addr_t msi_iova; + struct vfio_group *group = vdev->vfio_group; + struct msi_msg msg; + int ret; + + get_cached_msi_msg(irq, &msg); + msi_addr = (phys_addr_t)(msg.address_hi) << 32 | + (phys_addr_t)(msg.address_lo); + + ret = vfio_group_alloc_map_reserved_iova(group, msi_addr, + IOMMU_WRITE, &msi_iova); + if (ret) + goto out; + + /* Re-program the msi-address with the iova */ + msg.address_hi = (u32)(msi_iova >> 32); + msg.address_lo = (u32)(msi_iova & 0xffffffff); + pci_write_msi_msg(irq, &msg); + +out: + return ret; +} + +/** + * vfio_unset_mapped_msi_addr: decrement the ref counter of the msi iova page + * associated to the linux irq (in case it is null unmaps and frees resources) + * + * @pdev: vfio pci device handle + * @irq: irq linux number + */ +static void vfio_unset_mapped_msi_addr(struct vfio_pci_device *vdev, int irq) +{ + dma_addr_t msi_iova; + struct vfio_group *group = vdev->vfio_group; + struct msi_msg msg; + + get_cached_msi_msg(irq, &msg); + msi_iova = (u64)(msg.address_hi) << 32 | (u64)(msg.address_lo); + vfio_group_unmap_free_reserved_iova(group, msi_iova); +} + static int vfio_msi_set_vector_signal(struct vfio_pci_device *vdev, int vector, int fd, bool msix) { @@ -318,6 +369,7 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_device *vdev, return -EINVAL; if (vdev->ctx[vector].trigger) { + vfio_unset_mapped_msi_addr(vdev, irq); free_irq(irq, vdev->ctx[vector].trigger); irq_bypass_unregister_producer(&vdev->ctx[vector].producer); kfree(vdev->ctx[vector].name); @@ -355,11 +407,8 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_device *vdev, ret = request_irq(irq, vfio_msihandler, 0, vdev->ctx[vector].name, trigger); - if (ret) { - kfree(vdev->ctx[vector].name); - eventfd_ctx_put(trigger); - return ret; - } + if (ret) + goto error_free; vdev->ctx[vector].producer.token = trigger; vdev->ctx[vector].producer.irq = irq; @@ -369,9 +418,23 @@ static int vfio_msi_set_vector_signal(struct vfio_pci_device *vdev, "irq bypass producer (token %p) registration fails: %d\n", vdev->ctx[vector].producer.token, ret); + if (vfio_group_require_msi_mapping(vdev->vfio_group)) { + ret = vfio_set_mapped_msi_addr(vdev, irq); + if (ret) + goto error_free_irq; + } + vdev->ctx[vector].trigger = trigger; return 0; + +error_free_irq: + free_irq(irq, vdev->ctx[vector].trigger); +error_free: + kfree(vdev->ctx[vector].name); + eventfd_ctx_put(trigger); + return ret; + } static int vfio_msi_set_block(struct vfio_pci_device *vdev, unsigned start,