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Thu, 28 Jan 2016 08:41:47 +0000 Received: from titan.ap.freescale.net ([10.192.208.233]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id u0S8fg1C000480; Thu, 28 Jan 2016 01:41:44 -0700 From: Yuan Yao To: Subject: [PATCH] dts/ls1021a: add the DTS for QSPI support Date: Thu, 28 Jan 2016 16:33:26 +0800 Message-ID: <1453970006-46509-1-git-send-email-yao.yuan@freescale.com> X-Mailer: git-send-email 2.1.0.27.g96db324 X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1; BN1AFFO11OLC004; 1:qPAQuypWMUZ3JvlAfa23ZDv5D4rZb2BzACc4m2HjCdjKvrHXg80pp+yDifAKN9faFqaxZGVzII2q4mBmc8yyyUvnkrgMWbmgVEZqwsVI959Cc5XCM9vlrdlQ6w8/yNmgoKP4P3+wB/UEkbfC2jsJ8NMqND1eWM4pV1WkLtmFdsBJgUMkiY/PstGHYMR5qRs7op/Ep/JsS3V2TfQNjWWNmG2vSpdI9XXCUYTDVL/xYSmX/QnTLIKIAiE+037RMFJLTcnYOJcGtfDJe5rC/SSl5EDqxmIJf6Xdly8FJqjd3P6GWFdZoRSmhssrLL161oRXw2VOQuMxYNQu3ffDO1s847es+AzSlwwGzaygu9lzofFSd35azgFW5BkQV5ex0+mfTrTzaUhrrnN+hxq9rKlyE0J3ZyWlWcrzyYmDgJwMQ7kVLV1SyWCUtZ4nk5DAr2NCY/5JoFNnShuJ/KckDsKMVA== X-Forefront-Antispam-Report: CIP:192.88.168.50; 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Add fsl-quadspi support for ls1021a chip and make SPI_FSL_QUADSPI selectable for LS1021A SOC hardwares. --- arch/arm/boot/dts/ls1021a.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 9430a99..c764fa5 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -252,6 +252,21 @@ status = "disabled"; }; + qspi: quadspi@1550000 { + compatible = "fsl,ls1021a-qspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x1550000 0x0 0x10000>, + <0x0 0x40000000 0x0 0x4000000>; + reg-names = "QuadSPI", "QuadSPI-memory"; + interrupts = ; + clock-names = "qspi_en", "qspi"; + clocks = <&platform_clk 1>, <&platform_clk 1>; + big-endian; + amba-base = <0x40000000>; + status = "disabled"; + }; + i2c0: i2c@2180000 { compatible = "fsl,vf610-i2c"; #address-cells = <1>;