From patchwork Fri Jan 29 17:21:46 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 8165201 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 132AE9FE6C for ; Fri, 29 Jan 2016 17:24:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4DCA720382 for ; Fri, 29 Jan 2016 17:24:32 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8501220380 for ; Fri, 29 Jan 2016 17:24:31 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aPClQ-0008CO-V9; Fri, 29 Jan 2016 17:23:16 +0000 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aPCks-00083K-F5 for linux-arm-kernel@lists.infradead.org; Fri, 29 Jan 2016 17:22:56 +0000 Received: from wens.csie.org (mirror2.csie.ntu.edu.tw [140.112.30.76]) (Authenticated sender: b93043) by smtp.csie.ntu.edu.tw (Postfix) with ESMTPSA id 9E2B720AF1; Sat, 30 Jan 2016 01:22:20 +0800 (CST) Received: by wens.csie.org (Postfix, from userid 1000) id 5FF665F730; Sat, 30 Jan 2016 01:22:20 +0800 (CST) From: Chen-Yu Tsai To: Ulf Hansson , Maxime Ripard Subject: [PATCH 1/3] mmc: sunxi: Support MMC_DDR52 timing modes Date: Sat, 30 Jan 2016 01:21:46 +0800 Message-Id: <1454088108-2332-2-git-send-email-wens@csie.org> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1454088108-2332-1-git-send-email-wens@csie.org> References: <1454088108-2332-1-git-send-email-wens@csie.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160129_092242_714966_44B0EFF0 X-CRM114-Status: UNSURE ( 8.56 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -4.2 (----) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-mmc@vger.kernel.org, linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, Hans de Goede , Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP DDR transfer modes include UHS-1 DDR50 and MMC HS-DDR (or MMC_DDR52). Consider MMC_DDR52 when setting clock delays. Since MMC high speed mode goes up to 52 MHz instead of 50 MHz for SD, and this number is visible in the capability macro, increase the clock rate upper limit to 52 MHz. Signed-off-by: Chen-Yu Tsai --- drivers/mmc/host/sunxi-mmc.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c index 765dfb9f77ec..fe6c171fd135 100644 --- a/drivers/mmc/host/sunxi-mmc.c +++ b/drivers/mmc/host/sunxi-mmc.c @@ -686,8 +686,9 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host, } else if (rate <= 25000000) { oclk_dly = host->clk_delays[SDXC_CLK_25M].output; sclk_dly = host->clk_delays[SDXC_CLK_25M].sample; - } else if (rate <= 50000000) { - if (ios->timing == MMC_TIMING_UHS_DDR50) { + } else if (rate <= 52000000) { + if (ios->timing == MMC_TIMING_UHS_DDR50 || + ios->timing == MMC_TIMING_MMC_DDR52) { oclk_dly = host->clk_delays[SDXC_CLK_50M_DDR].output; sclk_dly = host->clk_delays[SDXC_CLK_50M_DDR].sample; } else { @@ -762,7 +763,8 @@ static void sunxi_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) /* set ddr mode */ rval = mmc_readl(host, REG_GCTRL); - if (ios->timing == MMC_TIMING_UHS_DDR50) + if (ios->timing == MMC_TIMING_UHS_DDR50 || + ios->timing == MMC_TIMING_MMC_DDR52) rval |= SDXC_DDR_MODE; else rval &= ~SDXC_DDR_MODE; @@ -1106,9 +1108,9 @@ static int sunxi_mmc_probe(struct platform_device *pdev) mmc->max_segs = PAGE_SIZE / sizeof(struct sunxi_idma_des); mmc->max_seg_size = (1 << host->idma_des_size_bits); mmc->max_req_size = mmc->max_seg_size * mmc->max_segs; - /* 400kHz ~ 50MHz */ + /* 400kHz ~ 52MHz */ mmc->f_min = 400000; - mmc->f_max = 50000000; + mmc->f_max = 52000000; mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;