| Message ID | 1455084651-29325-5-git-send-email-anup.patel@broadcom.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 09/02/16 22:10, Anup Patel wrote: > The ARM SP805 DT node is already present in various DTS files. > This patch adds missing DT bindings documentation for ARM SP805. > > Signed-off-by: Anup Patel <anup.patel@broadcom.com> > Reviewed-by: Ray Jui <rjui@broadcom.com> > Reviewed-by: Vikram Prakash <vikramp@broadcom.com> > Reviewed-by: Scott Branden <sbranden@broadcom.com> Rob, we would probably want an Ack from you on this one, but should we route this through an arm-soc pull request for Broadcom SoCs, or do you want to pick it in your tree directly? Thanks! > --- > .../devicetree/bindings/watchdog/arm,sp805.txt | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > create mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.txt > > diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt > new file mode 100644 > index 0000000..6ebb77d > --- /dev/null > +++ b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt > @@ -0,0 +1,17 @@ > +ARM AMBA Primecell SP805 Watchdog > + > +Required properties: > +- compatible: Should be "arm,sp805" & "arm,primecell" > +- reg: Should contain location and length for watchdog timer register. > +- interrupts: Should contain the list of watchdog timer interrupts. > +- clocks: clocks driving the watchdog timer hardware. This list should be 2 > + clocks. With 2 clocks, the order is wdogclk clock, apb_pclk. > + > +Example: > + wdt@66090000 { > + compatible = "arm,sp805", "arm,primecell"; > + reg = <0x66090000 0x1000>; > + interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&apb_pclk>,<&apb_pclk>; > + clock-names = "wdogclk", "apb_pclk"; > + }; >
On Wed, Feb 10, 2016 at 11:40:49AM +0530, Anup Patel wrote: > The ARM SP805 DT node is already present in various DTS files. > This patch adds missing DT bindings documentation for ARM SP805. > > Signed-off-by: Anup Patel <anup.patel@broadcom.com> > Reviewed-by: Ray Jui <rjui@broadcom.com> > Reviewed-by: Vikram Prakash <vikramp@broadcom.com> > Reviewed-by: Scott Branden <sbranden@broadcom.com> > --- > .../devicetree/bindings/watchdog/arm,sp805.txt | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > create mode 100644 Documentation/devicetree/bindings/watchdog/arm,sp805.txt > > diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt > new file mode 100644 > index 0000000..6ebb77d > --- /dev/null > +++ b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt > @@ -0,0 +1,17 @@ > +ARM AMBA Primecell SP805 Watchdog > + > +Required properties: > +- compatible: Should be "arm,sp805" & "arm,primecell" > +- reg: Should contain location and length for watchdog timer register. > +- interrupts: Should contain the list of watchdog timer interrupts. > +- clocks: clocks driving the watchdog timer hardware. This list should be 2 > + clocks. With 2 clocks, the order is wdogclk clock, apb_pclk. > + > +Example: > + wdt@66090000 { This should be watchdog@... Otherwise: Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.txt b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt new file mode 100644 index 0000000..6ebb77d --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/arm,sp805.txt @@ -0,0 +1,17 @@ +ARM AMBA Primecell SP805 Watchdog + +Required properties: +- compatible: Should be "arm,sp805" & "arm,primecell" +- reg: Should contain location and length for watchdog timer register. +- interrupts: Should contain the list of watchdog timer interrupts. +- clocks: clocks driving the watchdog timer hardware. This list should be 2 + clocks. With 2 clocks, the order is wdogclk clock, apb_pclk. + +Example: + wdt@66090000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x66090000 0x1000>; + interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apb_pclk>,<&apb_pclk>; + clock-names = "wdogclk", "apb_pclk"; + };