From patchwork Wed Feb 24 15:16:46 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Petazzoni X-Patchwork-Id: 8408931 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D3FFDC0553 for ; Wed, 24 Feb 2016 15:21:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 03C9D2021A for ; Wed, 24 Feb 2016 15:21:44 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ED2F5201F5 for ; Wed, 24 Feb 2016 15:21:42 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aYbER-0005TU-Vj; Wed, 24 Feb 2016 15:20:04 +0000 Received: from down.free-electrons.com ([37.187.137.238] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aYbBh-0002vP-Rk for linux-arm-kernel@lists.infradead.org; Wed, 24 Feb 2016 15:17:19 +0000 Received: by mail.free-electrons.com (Postfix, from userid 110) id 2951121E; Wed, 24 Feb 2016 16:16:54 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (AToulouse-657-1-984-111.w86-217.abo.wanadoo.fr [86.217.138.111]) by mail.free-electrons.com (Postfix) with ESMTPSA id DCA1EB35; Wed, 24 Feb 2016 16:16:53 +0100 (CET) From: Thomas Petazzoni To: Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement Subject: [PATCH 2/3] arm64: marvell: update Armada AP806 clock description Date: Wed, 24 Feb 2016 16:16:46 +0100 Message-Id: <1456327007-31008-3-git-send-email-thomas.petazzoni@free-electrons.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1456327007-31008-1-git-send-email-thomas.petazzoni@free-electrons.com> References: <1456327007-31008-1-git-send-email-thomas.petazzoni@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160224_071714_326384_0592FF6D X-CRM114-Status: UNSURE ( 9.82 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lior Amsalem , Thomas Petazzoni , Yehuda Yitschak , Nadav Haklai , Neta Zur Hershkovits , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Following the review from the DT maintainers, the DT binding for the clocks has changed, and we now use a DFX server node exposing a syscon, with the clock nodes being subnodes of the DFX server node. This commit therefore updates the AP806 Device Tree file to use this new DT binding. Signed-off-by: Thomas Petazzoni --- arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 37 +++++++++++++++------------ 1 file changed, 20 insertions(+), 17 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi index 63f25ce..88e3348 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi @@ -179,23 +179,6 @@ }; - coreclk: clk@0x6F8204 { - compatible = "marvell,armada-ap806-core-clock"; - reg = <0x6F8204 0x04>; - #clock-cells = <1>; - clock-output-names = "ddr", "ring", "cpu"; - }; - - ringclk: clk@0x6F8250 { - compatible = "marvell,armada-ap806-ring-clock"; - reg = <0x6F8250 0x04>; - #clock-cells = <1>; - clock-output-names = "ring-0", "ring-2", - "ring-3", "ring-4", - "ring-5"; - clocks = <&coreclk 1>; - }; - xor0@400000 { compatible = "marvell,mv-xor-v2"; reg = <0x400000 0x1000>, @@ -227,6 +210,26 @@ msi-parent = <&gic_v2m0>; dma-coherent; }; + + dfx-server@6f8000 { + compatible = "simple-mfd", "syscon"; + reg = <0x6f8000 0x70000>; + + coreclk: clk@204 { + compatible = "marvell,armada-ap806-core-clock"; + #clock-cells = <1>; + clock-output-names = "ddr", "ring", "cpu"; + }; + + ringclk: clk@250 { + compatible = "marvell,armada-ap806-ring-clock"; + #clock-cells = <1>; + clock-output-names = "ring-0", "ring-2", + "ring-3", "ring-4", + "ring-5"; + clocks = <&coreclk 1>; + }; + }; }; };