From patchwork Thu Feb 25 22:36:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Franklin Cooper X-Patchwork-Id: 8427221 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A90089F2F0 for ; Thu, 25 Feb 2016 22:40:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DA21F20279 for ; Thu, 25 Feb 2016 22:40:06 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 06B9D201F2 for ; Thu, 25 Feb 2016 22:40:06 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aZ4YT-0001c9-Dl; Thu, 25 Feb 2016 22:38:41 +0000 Received: from mail-ob0-f194.google.com ([209.85.214.194]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aZ4X1-0000Nj-Ky for linux-arm-kernel@lists.infradead.org; Thu, 25 Feb 2016 22:37:13 +0000 Received: by mail-ob0-f194.google.com with SMTP id wz1so4134950obc.1 for ; Thu, 25 Feb 2016 14:36:51 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=eLSA4tSM1Q1Htdlohn741a4E5YF9KWXylPOiuoidm2o=; b=bY0pcZtU50Z2EL6FU1DU/RUv8MAxKKXS1PT7LcRWaAM7JINa7bh5i5Ar67RfCqZlIe +duKK+uuMi29hFN2XGS9nXcul07Lx6l+SbOVTniCRAk5NWhHkpbob26r1XDc9iHowQPo DNDPHxm9LyAt/K8KojQMv7r8kcTS/QNz6vUKLPThVcvd2MyJGInbT5SBcOgxaSAg+zNa Adv5opdeBZOCk2EQaZOFwzBVb/J7oUU3YxKuF8XZ/aCbHn7sCS8HkVbl+xc+r1d4+wVs JSwO8DewTusqgjLI7w3YDMOVH0QhZlCqTWrUo4/T1RyMoq4vXl+mmiQkDFwtL3O2WOhh 6LaA== X-Gm-Message-State: AG10YOSxRwdxq1oBzCq0gjinmR3l48tBqIu4wHKsD6/dr05TkJUfeCqExzfrhZJAty/6hg== X-Received: by 10.182.148.39 with SMTP id tp7mr39200843obb.87.1456439810843; Thu, 25 Feb 2016 14:36:50 -0800 (PST) Received: from beast-server.fios-router.home (pool-173-57-21-86.dllstx.fios.verizon.net. [173.57.21.86]) by smtp.gmail.com with ESMTPSA id d10sm6691995oem.0.2016.02.25.14.36.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 25 Feb 2016 14:36:50 -0800 (PST) From: Franklin S Cooper Jr To: paul@pwsan.com, t-kristo@ti.com, tony@atomide.com, vigneshr@ti.com, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: [PATCH v3 5/5] ARM: dts: DRA7: Add dt nodes for PWMSS Date: Thu, 25 Feb 2016 16:36:36 -0600 Message-Id: <1456439796-28546-6-git-send-email-fcooper@ti.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1456439796-28546-1-git-send-email-fcooper@ti.com> References: <1456439796-28546-1-git-send-email-fcooper@ti.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160225_143711_896682_6876EB98 X-CRM114-Status: GOOD ( 13.27 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Vignesh R Add PWMSS device tree nodes for DRA7 SoC family and add documentation for dt bindings. Signed-off-by: Vignesh R --- Version 3 changes: None .../devicetree/bindings/pwm/pwm-tiehrpwm.txt | 8 +++ .../devicetree/bindings/pwm/pwm-tipwmss.txt | 17 +++++- arch/arm/boot/dts/dra7.dtsi | 64 ++++++++++++++++++++++ 3 files changed, 88 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt index 9c100b2..25d91ae 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt @@ -4,6 +4,7 @@ Required properties: - compatible: Must be "ti,-ehrpwm". for am33xx - compatible = "ti,am33xx-ehrpwm"; for da850 - compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; + for dra7xx - compatible = "ti,dra7xx-ehrpwm", "ti,am33xx-ehrpwm"; - #pwm-cells: should be 3. See pwm.txt in this directory for a description of the cells format. The only third cell flag supported by this binding is PWM_POLARITY_INVERTED. @@ -27,3 +28,10 @@ ehrpwm0: ehrpwm@0 { /* EHRPWM on da850 */ #pwm-cells = <3>; reg = <0x300000 0x2000>; }; + +ehrpwm0: ehrpwm@0 { /* EHRPWM on dra7xx */ + compatible = "ti,dra7xx-ehrpwm", "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48440200 0x80>; + ti,hwmods = "ehrpwm0"; +}; diff --git a/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt b/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt index f7eae77..9270ce6 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt @@ -1,7 +1,9 @@ TI SOC based PWM Subsystem Required properties: -- compatible: Must be "ti,am33xx-pwmss"; +- compatible: Must be "ti,-pwmss". + for am33xx - compatible = "ti,am33xx-pwmss" + for dra7xx - compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss" - reg: physical base address and size of the registers map. - address-cells: Specify the number of u32 entries needed in child nodes. Should set to 1. @@ -29,3 +31,16 @@ pwmss0: pwmss@48300000 { /* child nodes go here */ }; + +epwmss0: epwmss@4843e000 { /* On DRA7xx */ + compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss"; + reg = <0x4843e000 0x30>; + ti,hwmods = "epwmss0"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x4843e100 0x4843e100 0x80 /* ECAP */ + 0x4843e180 0x4843e180 0x80 /* EQEP */ + 0x4843e200 0x4843e200 0x80>; /* EHRPWM */ + + /* child nodes go here */ +}; diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index c4d9175..9143db0 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1597,6 +1597,70 @@ clock-names = "fck", "sys_clk"; }; }; + + epwmss0: epwmss@4843e000 { + compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss"; + reg = <0x4843e000 0x30>; + ti,hwmods = "epwmss0"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + ranges = <0x4843e100 0x4843e100 0x80 /* ECAP */ + 0x4843e180 0x4843e180 0x80 /* EQEP */ + 0x4843e200 0x4843e200 0x80>;/* EHRPWM */ + + ehrpwm0: ehrpwm@4843e200 { + compatible = "ti,dra7xx-ehrpwm", + "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x4843e200 0x80>; + ti,hwmods = "ehrpwm0"; + status = "disabled"; + }; + }; + + epwmss1: epwmss@48440000 { + compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss"; + reg = <0x48440000 0x30>; + ti,hwmods = "epwmss1"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + ranges = <0x48440100 0x48440100 0x80 /* ECAP */ + 0x48440180 0x48440180 0x80 /* EQEP */ + 0x48440200 0x48440200 0x80>; /* EHRPWM */ + + ehrpwm1: ehrpwm@48440200 { + compatible = "ti,dra7xx-ehrpwm", + "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48440200 0x80>; + ti,hwmods = "ehrpwm1"; + status = "disabled"; + }; + }; + + epwmss2: epwmss@48442000 { + compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss"; + reg = <0x48442000 0x30>; + ti,hwmods = "epwmss2"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + + ranges = <0x48442100 0x48442100 0x80 /* ECAP */ + 0x48442180 0x48442180 0x80 /* EQEP */ + 0x48442200 0x48442200 0x80>; /* EHRPWM */ + + ehrpwm2: ehrpwm@48442200 { + compatible = "ti,dra7xx-ehrpwm", + "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48442200 0x80>; + ti,hwmods = "ehrpwm2"; + status = "disabled"; + }; + }; }; thermal_zones: thermal-zones {