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[2.238.57.164]) by smtp.gmail.com with ESMTPSA id gg7sm17680003wjd.10.2016.02.27.10.02.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 27 Feb 2016 10:02:13 -0800 (PST) From: Carlo Caione To: ulf.hansson@linaro.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux@arm.linux.org.uk, devicetree@vger.kernel.org, linux-meson@googlegroups.com, linux@endlessm.com Subject: [PATCH v5 3/4] ARM: dts: meson8b: Add MMC nodes Date: Sat, 27 Feb 2016 19:01:47 +0100 Message-Id: <1456596108-1406-4-git-send-email-carlo@caione.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1456596108-1406-1-git-send-email-carlo@caione.org> References: <1456596108-1406-1-git-send-email-carlo@caione.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160227_100233_052816_E94D2FC9 X-CRM114-Status: UNSURE ( 9.46 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.4 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Carlo Caione MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Carlo Caione Enable the MMC for the Meson8b platforms. Signed-off-by: Carlo Caione --- arch/arm/boot/dts/meson8b-mxq.dts | 8 ++++++++ arch/arm/boot/dts/meson8b-odroidc1.dts | 8 ++++++++ arch/arm/boot/dts/meson8b.dtsi | 16 ++++++++++++++++ 3 files changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/meson8b-mxq.dts b/arch/arm/boot/dts/meson8b-mxq.dts index c7fdaea..5c533a6 100644 --- a/arch/arm/boot/dts/meson8b-mxq.dts +++ b/arch/arm/boot/dts/meson8b-mxq.dts @@ -60,6 +60,14 @@ }; }; +&mmc0 { + status = "okay"; + pinctrl-names = "sdio_b"; + pinctrl-0 = <&mmc0_sd_b_pins>; + meson,sd-port = <1>; + broken-cd; +}; + &uart_AO { status = "okay"; pinctrl-0 = <&uart_ao_a_pins>; diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts index e50f1a1..a060c84 100644 --- a/arch/arm/boot/dts/meson8b-odroidc1.dts +++ b/arch/arm/boot/dts/meson8b-odroidc1.dts @@ -71,6 +71,14 @@ }; }; +&mmc0 { + status = "okay"; + pinctrl-names = "sdio_b"; + pinctrl-0 = <&mmc0_sd_b_pins>; + meson,sd-port = <1>; + broken-cd; +}; + &uart_AO { status = "okay"; pinctrl-0 = <&uart_ao_a_pins>; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 8bad557..25d795c 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -187,6 +187,22 @@ function = "uart_ao"; }; }; + + mmc0_sd_b_pins: mmc0_sd_b { + mux { + groups = "sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b", + "sd_d3_b", "sd_d2_b"; + function = "sd_b"; + }; + }; + }; + + mmc0: mmc@c1108c20 { + compatible = "amlogic,meson-mmc"; + reg = <0xc1108c20 0x20>; + interrupts = <0 28 1>; + clocks = <&clkc CLKID_CLK81>; + status = "disabled"; }; }; }; /* end of / */