From patchwork Sun Feb 28 15:37:01 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Sperl X-Patchwork-Id: 8447401 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2FB789F314 for ; Sun, 28 Feb 2016 15:46:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5D03E2034A for ; Sun, 28 Feb 2016 15:46:36 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7C03020340 for ; Sun, 28 Feb 2016 15:46:35 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aa3Wp-0003SO-DE; Sun, 28 Feb 2016 15:45:03 +0000 Received: from 212-186-180-163.dynamic.surfer.at ([212.186.180.163] helo=cgate.sperl.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aa3QI-0005Pu-TL; Sun, 28 Feb 2016 15:38:19 +0000 Received: from raspcm.intern.sperl.org (account martin@sperl.org [10.10.10.41] verified) by sperl.org (CommuniGate Pro SMTP 6.1.2) with ESMTPSA id 6394908; Sun, 28 Feb 2016 15:37:21 +0000 From: kernel@martin.sperl.org To: Michael Turquette , Stephen Boyd , Stephen Warren , Lee Jones , Eric Anholt , linux-clk@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 10/20] clk: bcm2835: implement correct clamping for mash clocks Date: Sun, 28 Feb 2016 15:37:01 +0000 Message-Id: <1456673831-2408-11-git-send-email-kernel@martin.sperl.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1456673831-2408-1-git-send-email-kernel@martin.sperl.org> References: <1456673831-2408-1-git-send-email-kernel@martin.sperl.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160228_073819_216226_3F18A6DF X-CRM114-Status: GOOD ( 10.19 ) X-Spam-Score: -0.9 (/) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Sperl MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Martin Sperl The bcm2835-soc has 2 kindes of clocks: * normal clocks * mash-enabled clocks that can spread frequency noise better into non-audiable frequency ranges The mash clocks have distinct clock-divider requirements and if the requested divider is not in range, then there will no clock output. This patch implements the clamping limits for first order fractual mash dividers. Only dividers that are impacted by this patch are: pcm and pwm Signed-off-by: Martin Sperl --- drivers/clk/bcm/clk-bcm2835.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c index 3df17a5..2fb9923 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c @@ -407,6 +407,7 @@ struct bcm2835_clock_data { /* Number of fractional bits in the divider */ u32 frac_bits; + bool is_mash_clock; bool is_vpu_clock; }; @@ -780,10 +781,19 @@ static u32 bcm2835_clock_choose_div(struct clk_hw *hw, div += unused_frac_mask + 1; div &= ~unused_frac_mask; - /* Clamp to the limits. */ - div = max(div, unused_frac_mask + 1); - div = min_t(u32, div, GENMASK(data->int_bits + CM_DIV_FRAC_BITS - 1, - CM_DIV_FRAC_BITS - data->frac_bits)); + /* Clamp to the limits for the clock type */ + if (data->is_mash_clock) { + /* clamp to min divider 2 */ + div = max_t(u32, div, 2 << CM_DIV_FRAC_BITS); + /* clamp to max int divider */ + div = min_t(u32, div, + (BIT(data->int_bits) - 1) << CM_DIV_FRAC_BITS); + } else { + div = max(div, unused_frac_mask + 1); + div = min_t(u32, div, + GENMASK(data->int_bits + CM_DIV_FRAC_BITS - 1, + CM_DIV_FRAC_BITS - data->frac_bits)); + } return div; } @@ -1512,13 +1522,15 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { .ctl_reg = CM_PCMCTL, .div_reg = CM_PCMDIV, .int_bits = 12, - .frac_bits = 12), + .frac_bits = 12, + .is_mash_clock = true), [BCM2835_CLOCK_PWM] = REGISTER_PER_CLK( .name = "pwm", .ctl_reg = CM_PWMCTL, .div_reg = CM_PWMDIV, .int_bits = 12, - .frac_bits = 12), + .frac_bits = 12, + .is_mash_clock = true), [BCM2835_CLOCK_UART] = REGISTER_PER_CLK( .name = "uart", .ctl_reg = CM_UARTCTL,