From patchwork Mon Feb 29 13:06:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laxman Dewangan X-Patchwork-Id: 8453941 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 443AB9F372 for ; Mon, 29 Feb 2016 13:22:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3E91020295 for ; Mon, 29 Feb 2016 13:22:49 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 356B320263 for ; Mon, 29 Feb 2016 13:22:48 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aaNkE-0000LW-PA; Mon, 29 Feb 2016 13:20:14 +0000 Received: from hqemgate16.nvidia.com ([216.228.121.65]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aaNk6-000820-4G for linux-arm-kernel@lists.infradead.org; Mon, 29 Feb 2016 13:20:07 +0000 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Mon, 29 Feb 2016 05:20:16 -0800 Received: from hqemhub02.nvidia.com ([172.20.150.31]) by hqnvupgp08.nvidia.com (PGP Universal service); Mon, 29 Feb 2016 05:19:28 -0800 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 29 Feb 2016 05:19:28 -0800 Received: from ldewanganubuntu-System-Product-Name.nvidia.com (172.20.144.16) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server (TLS) id 8.3.406.0; Mon, 29 Feb 2016 05:19:36 -0800 From: Laxman Dewangan To: , Subject: [PATCH 2/2] arm64: tegra: Jetson-TX1: Add DT entry for system PMIC MAX77620 Date: Mon, 29 Feb 2016 18:36:51 +0530 Message-ID: <1456751211-14341-2-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1456751211-14341-1-git-send-email-ldewangan@nvidia.com> References: <1456751211-14341-1-git-send-email-ldewangan@nvidia.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160229_052006_266863_5CD04023 X-CRM114-Status: GOOD ( 10.33 ) X-Spam-Score: -6.9 (------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, linux-kernel@vger.kernel.org, robh+dt@kernel.org, Laxman Dewangan , galak@codeaurora.org, linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP NVIDIA's Tegra210 platform Jetson-TX1 uses the Maxim Semiconductor's PMIC MAX77620 as system PMIC. Add DT entry for this device which enabled core registration, GPIO, pin control, power sequencing and regulator functionalities. This patch is created based on downstream data and new DT properties. Signed-off-by: Laxman Dewangan --- The patches for drivers of MFD/GPIO/Pincontrol are in flight. arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 205 +++++++++++++++++++++ 1 file changed, 205 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts index 18147eb..1f0788b 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts @@ -2,12 +2,217 @@ #include "tegra210-p2180.dtsi" #include "tegra210-p2597.dtsi" +#include #include / { model = "NVIDIA Jetson TX1 Developer Kit"; compatible = "nvidia,p2371-2180", "nvidia,tegra210"; + i2c@0,7000d000 { + status = "okay"; + system-pmic@3c { + compatible = "maxim,max77620"; + reg = <0x3c>; + interrupts = <0 86 IRQ_TYPE_NONE>; + + #interrupt-cells = <2>; + interrupt-controller; + + gpio-controller; + #gpio-cells = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&system_pmic_default>; + + in-ldo0-1-supply = <&spmic_sd2>; + in-ldo7-8-supply = <&spmic_sd2>; + + system_pmic_default: default { + pin_gpio0 { + pins = "gpio0"; + function = "gpio"; + }; + + pin_gpio1 { + pins = "gpio1"; + function = "fps-out"; + drive-push-pull = <1>; + maxim,active-fps-source = ; + maxim,active-fps-power-up-slot = <7>; + maxim,active-fps-power-down-slot = <0>; + }; + + pin_gpio2_3 { + pins = "gpio2", "gpio3"; + function = "fps-out"; + drive-open-drain = <1>; + maxim,active-fps-source = ; + }; + + pin_gpio4 { + pins = "gpio4"; + function = "32k-out1"; + }; + + pin_gpio5_6_7 { + pins = "gpio5", "gpio6", "gpio7"; + function = "gpio"; + drive-push-pull = <1>; + }; + }; + + fps { + fps0 { + maxim,suspend-fps-time-period-us = <1280>; + maxim,fps-event-source = ; + }; + + fps1 { + maxim,suspend-fps-time-period-us = <1280>; + maxim,fps-event-source = ; + }; + + fps2 { + maxim,fps-event-source = ; + }; + }; + + regulators { + sd0 { + regulator-name = "vdd-core"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1400000>; + regulator-boot-on; + regulator-always-on; + regulator-enable-ramp-delay = <146>; + regulator-ramp-delay = <27500>; + maxim,fps-source = ; + }; + + sd1 { + regulator-name = "vddio-ddr"; + regulator-always-on; + regulator-boot-on; + regulator-enable-ramp-delay = <130>; + regulator-ramp-delay = <27500>; + maxim,active-fps-source = ; + }; + + spmic_sd2: sd2 { + regulator-name = "vdd-pre-reg"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-enable-ramp-delay = <176>; + regulator-ramp-delay = <27500>; + maxim,active-fps-source = ; + }; + + sd3 { + regulator-name = "vdd-1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-enable-ramp-delay = <242>; + regulator-ramp-delay = <27500>; + maxim,active-fps-source = ; + }; + + ldo0 { + regulator-name = "avdd-sys"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + regulator-enable-ramp-delay = <26>; + regulator-ramp-delay = <100000>; + maxim,active-fps-source = ; + }; + + ldo1 { + regulator-name = "vdd-pex"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + regulator-enable-ramp-delay = <22>; + regulator-ramp-delay = <100000>; + maxim,active-fps-source = ; + }; + + ldo2 { + regulator-name = "vddio-sdmmc1"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <62>; + regulator-ramp-delay = <100000>; + maxim,active-fps-source = ; + }; + + ldo3 { + regulator-name = "vdd-cam-hv"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <50>; + regulator-ramp-delay = <100000>; + maxim,active-fps-source = ; + }; + + ldo4 { + regulator-name = "vdd-rtc"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-always-on; + regulator-boot-on; + regulator-enable-ramp-delay = <22>; + regulator-ramp-delay = <100000>; + maxim,active-fps-source = ; + }; + + ldo5 { + regulator-name = "avdd-ts-hv"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <62>; + regulator-ramp-delay = <100000>; + maxim,active-fps-source = ; + }; + + ldo6 { + regulator-name = "vdd-ts"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <36>; + regulator-ramp-delay = <100000>; + maxim,active-fps-source = ; + maxim,active-fps-power-up-slot = <7>; + maxim,active-fps-power-down-slot = <0>; + }; + + ldo7 { + regulator-name = "vdd-gen-pll-edp"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + regulator-boot-on; + regulator-enable-ramp-delay = <24>; + regulator-ramp-delay = <100000>; + maxim,active-fps-source = ; + }; + + ldo8 { + regulator-name = "vdd-hdmi-dp"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + regulator-enable-ramp-delay = <22>; + regulator-ramp-delay = <100000>; + maxim,active-fps-source = ; + }; + }; + }; + }; + gpio-keys { compatible = "gpio-keys"; label = "gpio-keys";