From patchwork Fri Mar 4 18:44:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sylvain Lemieux X-Patchwork-Id: 8507051 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 92665C0553 for ; Fri, 4 Mar 2016 18:46:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B48F720138 for ; Fri, 4 Mar 2016 18:46:45 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A073020108 for ; Fri, 4 Mar 2016 18:46:40 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1abuit-0007k4-8h; Fri, 04 Mar 2016 18:45:11 +0000 Received: from mail-ig0-x243.google.com ([2607:f8b0:4001:c05::243]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1abuiW-00075r-4d for linux-arm-kernel@lists.infradead.org; Fri, 04 Mar 2016 18:44:49 +0000 Received: by mail-ig0-x243.google.com with SMTP id sv7so210371igc.1 for ; Fri, 04 Mar 2016 10:44:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hr2MrQF6uAjv7xbRZ4yVCRS7UZHnNdh2sgPigHttZOg=; b=XV298UBmq+epGdcGepyNlNciUJCLrvcUeZToGtZRM53kFdr5mfE3CJ6Kf9Qt5lkfFc eqRfRem7uNbxPCuXjzg7xNa4WuDhmcdwYV45o+FhBkpd5lJtG/N1shQbo7j6pqyyK1yY Ma18603wEuxD4T4qgpBVVHCbgyq0Rn3xB9oI2M75xVrc83c+1Mwq8cQ/j1g07Db+H6nI B6IMZONJKpNnsHX3pN/J8wP8684Fry0GH/VAgyW1efDbBd/HnBV8MTrvSi7buxhiR/TV fT5wl+bDO2eggk3W/rkyh0C8Dj5aIwtT+8VB588T1rlYEL+m5ngnYF9C4itLMGnOjUsU i4mg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hr2MrQF6uAjv7xbRZ4yVCRS7UZHnNdh2sgPigHttZOg=; b=k96S7WYSl3OgwDDmvne6N23wUFLAFRxkFnRmRb3rXKJhmVsR941Pq5SSWupa9SmmMc R5YqBvN9pWyqqPk77zVsh+jTgRpXD8uN6xvSoEb8atBy8xD6lf9A0NmFPfeeIeEKi+3f 681G8NL6VXzC7YPMx6uamjaPj1sqQXBwZaG/pUSSRrwLLC/oSoE0n9zVIRYKe2YH1iiJ 95BAWQvki9kVdjTn1inO/fyzuMYTg5J4Zc3VfaGNxchwETpDMbe1kv4M8N+lJmcPCK9O 4iBtRbfxuLkqv3GQKxrHqWqCa3Fx3dAMIJcImVo10H+CG+BUmLdUw6npu7QsCQ5YGS+I rY1A== X-Gm-Message-State: AD7BkJKVBxQIEYyXtK5rN0wBQFWV2bQuZUcve5iHqt/6o+kJsNQI3ulK2lOx+Uu1CmdU1w== X-Received: by 10.50.43.202 with SMTP id y10mr363199igl.67.1457117071014; Fri, 04 Mar 2016 10:44:31 -0800 (PST) Received: from CABRO3AP00510.americas.tsp.ad ([74.51.240.241]) by smtp.gmail.com with ESMTPSA id nh19sm146470igb.2.2016.03.04.10.44.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 04 Mar 2016 10:44:29 -0800 (PST) From: Sylvain Lemieux To: linux-arm-kernel@lists.infradead.org, arnd@arndb.de, linux@roeck-us.net, manabian@gmail.com Subject: [PATCH v7 3/6] watchdog: pnx4008: add support for soft reset Date: Fri, 4 Mar 2016 13:44:07 -0500 Message-Id: <1457117050-13543-4-git-send-email-slemieux.tyco@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1457117050-13543-1-git-send-email-slemieux.tyco@gmail.com> References: <1457117050-13543-1-git-send-email-slemieux.tyco@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160304_104448_552458_543DE3C6 X-CRM114-Status: GOOD ( 13.80 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stigge@antcom.de, wim@iguana.be, linux-watchdog@vger.kernel.org, vz@mleia.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.3 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RCVD_IN_SORBS_WEB, RP_MATCHES_RCVD, T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sylvain Lemieux Add support for explicit soft reset using the reboot mode. The default reboot mode behavior is unchanged; you can overwrite the default reboot type in the board specific file "DT_MACHINE_START" definition using the "reboot_mode" parameter. Signed-off-by: Sylvain Lemieux Reviewed-by: Guenter Roeck --- Changes from v6 to v7: - Added Reviewed-by from v6. Changes from v5 to v6: - remove typecast. Changes from v4 to v5: - no logical change; updated to work with new revision of patch #2. Changes from v3 to v4: - none. Changes from v2 to v3: - no logical change; updated to work with new revision of patch #2. Changes from v1 to v2: - Rename patch title; was "arm: lpc32xx: restart: add support for soft reset" - Add change to "pnx-4008" driver instead of "mach-lpc32xx". - Use define available in "pnx-4008" when writting to watchdog register. drivers/watchdog/pnx4008_wdt.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/watchdog/pnx4008_wdt.c b/drivers/watchdog/pnx4008_wdt.c index f3be522..51be66e 100644 --- a/drivers/watchdog/pnx4008_wdt.c +++ b/drivers/watchdog/pnx4008_wdt.c @@ -129,9 +129,16 @@ static int pnx4008_wdt_set_timeout(struct watchdog_device *wdd, static int pnx4008_restart_handler(struct watchdog_device *wdd, unsigned long mode, void *cmd) { - /* Instant assert of RESETOUT_N with pulse length 1mS */ - writel(13000, WDTIM_PULSE(wdt_base)); - writel(M_RES2 | RESFRC1 | RESFRC2, WDTIM_MCTRL(wdt_base)); + if (mode == REBOOT_SOFT) { + /* Force match output active */ + writel(EXT_MATCH0, WDTIM_EMR(wdt_base)); + /* Internal reset on match output (RESOUT_N not asserted) */ + writel(M_RES1, WDTIM_MCTRL(wdt_base)); + } else { + /* Instant assert of RESETOUT_N with pulse length 1mS */ + writel(13000, WDTIM_PULSE(wdt_base)); + writel(M_RES2 | RESFRC1 | RESFRC2, WDTIM_MCTRL(wdt_base)); + } /* Wait for watchdog to reset system */ mdelay(1000);