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Mon, 14 Mar 2016 11:04:23 +0900 (KST) From: Chanwoo Choi To: k.kozlowski@samsung.com, kgene@kernel.org, s.nawrocki@samsung.com, tomasz.figa@gmail.com Subject: [PATCH 03/10] ARM: dts: Add UART2 dt node for Exynos3250 SoC Date: Mon, 14 Mar 2016 11:04:08 +0900 Message-id: <1457921056-21257-4-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1457921056-21257-1-git-send-email-cw00.choi@samsung.com> References: <1457921056-21257-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrLLMWRmVeSWpSXmKPExsWyRsSkUFdd5lmYwfbH+hbbjzxjtbj+5Tmr xfwj51gtJt2fwGJx41cbq8XrF4YW/Y9fM1tsenyN1eLyrjlsFjPO72OyWLT1C7vF4TftrBYz Jr9ks1i16w+jA5/Hzll32T02repk89i8pN6jb8sqRo/Pm+QCWKO4bFJSczLLUov07RK4Mn5d PMVU8JWvYtKf/6wNjFN5uhg5OSQETCTaF/xkgbDFJC7cW8/WxcjFISSwglHi3bQnbDBFu89O ZYFIzGKUaF7WwArhfGGU2N44gRmkik1AS2L/ixtgHSICcRITL0LYzAKzmCTmzS8EsYUFXCU+ 7oSoZxFQlVjUex3M5gWKr2hbwA6xTU7iw55HYDangJvEriOvWEFsIaCafbdPMIIslhA4xS6x 6PsfRohBAhLfJh8COo8DKCErsekAM8QcSYmDK26wTGAUXsDIsIpRNLUguaA4Kb3IWK84Mbe4 NC9dLzk/dxMjMFZO/3vWv4Px7gHrQ4wCHIxKPLw/1jwNE2JNLCuuzD3EaAq0YSKzlGhyPjAi 80riDY3NjCxMTUyNjcwtzZTEeRdK/QwWEkhPLEnNTk0tSC2KLyrNSS0+xMjEwSnVwKizs/HE 2lnCJ/tLUsIL7t7Idg+0Prj7Y82KfYouKvcMN62zmtxbk1JkNXNV0O4XxZGS0ReP2ybNbJe+ JBIwcX5Wq0aV5r/7v9u/VNy5PXXJuv8r3q2/uib9kNtRwYaPRYf8pY+UcmefuH9O0yz0+OtI 6XBPjiXP6mPMfrfKuyZefxHQaBEk6KzEUpyRaKjFXFScCAAnXYc8kAIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrFIsWRmVeSWpSXmKPExsVy+t9jQV11mWdhBrf+alpsP/KM1eL6l+es FvOPnGO1mHR/AovFjV9trBavXxha9D9+zWyx6fE1VovLu+awWcw4v4/JYtHWL+wWh9+0s1rM mPySzWLVrj+MDnweO2fdZffYtKqTzWPzknqPvi2rGD0+b5ILYI1qYLTJSE1MSS1SSM1Lzk/J zEu3VfIOjneONzUzMNQ1tLQwV1LIS8xNtVVy8QnQdcvMATpUSaEsMacUKBSQWFyspG+HaUJo iJuuBUxjhK5vSBBcj5EBGkhYw5jx6+IppoKvfBWT/vxnbWCcytPFyMkhIWAisfvsVBYIW0zi wr31bF2MXBxCArMYJZqXNbBCOF8YJbY3TmAGqWIT0JLY/+IGG4gtIhAnMfEihM0sMItJYt78 QhBbWMBV4uNOiHoWAVWJRb3XwWxeoPiKtgXsENvkJD7seQRmcwq4Sew68ooVxBYCqtl3+wTj BEbeBYwMqxglUguSC4qT0nON8lLL9YoTc4tL89L1kvNzNzGC4/GZ9A7Gw7vcDzEKcDAq8fD+ WPM0TIg1say4MvcQowQHs5IIr7fkszAh3pTEyqrUovz4otKc1OJDjKZAh01klhJNzgemiryS eENjEzMjSyNzQwsjY3Mlcd7H/9eFCQmkJ5akZqemFqQWwfQxcXBKNTCK/wi8r+89z3cJf5v2 gS63L/fk1tnuW1zBYbHB+GDXZwcGqwXLJq1bPW8id5vO3PsuL9rdFWKT1NQ9HssZM/lm6Zh6 nDNt+2b2yahT5OUyF2uVd+8bnNYfnDpRf7NUh71vItOaA/MlfXjslL4stK5ISl7iLcqts1Wh /t8N8xjO1xkNcywXGCuxFGckGmoxFxUnAgBai9Zk3QIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160313_190447_840201_27C3C277 X-CRM114-Status: GOOD ( 11.11 ) X-Spam-Score: -6.9 (------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: inki.dae@samsung.com, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, pankaj.dubey@samsung.com, sw0312.kim@samsung.com, linux-kernel@vger.kernel.org, andi.shyti@samsung.com, jh80.chung@samsung.com, cw00.choi@samsung.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Pankaj Dubey This patch add the uart2 devicetree node for Exynos3250 SoC. Cc: Kukjin Kim Cc: Krzysztof Kozlowski Signed-off-by: Pankaj Dubey Signed-off-by: Chanwoo Choi Reviewed-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 7 +++++++ arch/arm/boot/dts/exynos3250.dtsi | 12 ++++++++++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index ecf79386e891..54c587f27265 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -158,6 +158,13 @@ samsung,pin-drv = <0>; }; + uart2_data: uart2-data { + samsung,pins = "gpa1-0", "gpa1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + i2c3_bus: i2c3-bus { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <3>; diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 18e3deffbf48..076677384d20 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -42,6 +42,7 @@ i2c7 = &i2c_7; serial0 = &serial_0; serial1 = &serial_1; + serial2 = &serial_2; }; cpus { @@ -465,6 +466,17 @@ status = "disabled"; }; + serial_2: serial@13820000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x13820000 0x100>; + interrupts = <0 111 0>; + clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>; + clock-names = "uart", "clk_uart_baud0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_data>; + status = "disabled"; + }; + i2c_0: i2c@13860000 { #address-cells = <1>; #size-cells = <0>;