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Mon, 14 Mar 2016 18:43:37 +0900 (KST) From: Chanwoo Choi To: k.kozlowski@samsung.com, kgene@kernel.org Subject: [PATCH v2] ARM: dts: Add initial pin configuration for exynos3250-rinato Date: Mon, 14 Mar 2016 18:43:36 +0900 Message-id: <1457948616-6730-1-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrILMWRmVeSWpSXmKPExsWyRsSkUPdk+7Mwg8ZJGhbXvzxntZh/5Byr xesXhha9C66yWfQ/fs1ssenxNVaLy7vmsFnMOL+PyYHDY9OqTjaPzUvqPfq2rGL0+LxJLoAl issmJTUnsyy1SN8ugStj+cUu5oKbyhX9q+6yNDAelOli5OCQEDCR2LfOoouRE8gUk7hwbz1b FyMXh5DACkaJpe/mskAkTCRO75jJDJGYxSjR0biNESQhJPCFUeLBAwUQm01AS2L/ixtsILaI gK7Eo6W/GUEamAWOMEpM+fWECSQhLBAssfh2HyuIzSKgKjGn7y1YnFfARWL5jMPsENvkJD7s ecQO0iwh0M4usbJjKTNEg4DEt8mHWCDOlpXYdIAZol5S4uCKGywTGAUXMDKsYhRNLUguKE5K LzLWK07MLS7NS9dLzs/dxAgM2dP/nvXvYLx7wPoQowAHoxIPr6fdszAh1sSy4srcQ4ymQBsm MkuJJucDIyOvJN7Q2MzIwtTE1NjI3NJMSZx3odTPYCGB9MSS1OzU1ILUovii0pzU4kOMTByc Ug2MC1JeSbB9K2Od/e74jtbA5Ad2J2YYnXJdO1df5LyJTdj8PeETc7rduBrnKjnOsHzk/+nN w1fLslm1BMrcBa51iHq/quhj9+/s/XVitb/ognXbVFlWlS2f+0jdMuP8pYa7298HHHWV3LFQ Znv13vwjzneXn13kuU56s+/iL8c/H3nN+sMj+NokYyWW4oxEQy3mouJEAJV+7q1UAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupnkeLIzCtJLcpLzFFi42I5/e+xoO7J9mdhBgs2KFlc//Kc1WL+kXOs Fq9fGFr0LrjKZtH/+DWzxabH11gtLu+aw2Yx4/w+JgcOj02rOtk8Ni+p9+jbsorR4/MmuQCW qAZGm4zUxJTUIoXUvOT8lMy8dFsl7+B453hTMwNDXUNLC3MlhbzE3FRbJRefAF23zBygK5QU yhJzSoFCAYnFxUr6dpgmhIa46VrANEbo+oYEwfUYGaCBhDWMGcsvdjEX3FSu6F91l6WB8aBM FyMnh4SAicTpHTOZIWwxiQv31rN1MXJxCAnMYpToaNzGCJIQEvjCKPHggQKIzSagJbH/xQ02 EFtEQFfi0dLfjCANzAJHGCWm/HrCBJIQFgiWWHy7jxXEZhFQlZjT9xYszivgIrF8xmF2iG1y Eh/2PGKfwMi9gJFhFaNEakFyQXFSeq5hXmq5XnFibnFpXrpecn7uJkZwZDyT2sF4cJf7IUYB DkYlHt4fa56GCbEmlhVX5h5ilOBgVhLh7Wh+FibEm5JYWZValB9fVJqTWnyI0RTogInMUqLJ +cCozSuJNzQ2MTOyNDI3tDAyNlcS5338f12YkEB6YklqdmpqQWoRTB8TB6dUA+NyjelBDFwP 06eFvJiWp9u7sElhc4jyg7fCD54K9s44uPpw6qXZk2+6OKlb+V3mTp+cPfnXDf6Dj269qeZd pJYYPfPMA1/e6SyrLHXMLA6+Zbw3WXTCCYXdvY9nfT0fsuDml3u/z+Zqisdxz4t/fTOqJb70 y519Rnxqb1q4JrCsLX33zeGAfc4+JZbijERDLeai4kQA2r4IhaICAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160314_024402_097856_8411D61E X-CRM114-Status: GOOD ( 13.03 ) X-Spam-Score: -6.9 (------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Kukjin Kim , linux-kernel@vger.kernel.org, cw00.choi@samsung.com, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds initial pin configuration using pinctrl subsystem to reduce leakage power-consumption of gpio pins in normal state. All pins included in this patch are NC (not connected) pin. Cc: Kukjin Kim Cc: Krzysztof Kozlowski Signed-off-by: Chanwoo Choi Reviewed-by: Krzysztof Kozlowski --- Changes from v1: - Add blank line below of gpm1-6 pin setting - Add reviewed tag of Krzysztof Kozlowski arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 38 +++++++++++++++++ arch/arm/boot/dts/exynos3250-rinato.dts | 71 ++++++++++++++++++++++++++++++- 2 files changed, 107 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index 5ab81c39e2c9..ecf79386e891 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -16,11 +16,49 @@ #define PIN_PULL_DOWN 1 #define PIN_PULL_UP 3 +#define PIN_DRV_LV1 0 +#define PIN_DRV_LV2 2 +#define PIN_DRV_LV3 1 +#define PIN_DRV_LV4 3 + #define PIN_PDN_OUT0 0 #define PIN_PDN_OUT1 1 #define PIN_PDN_INPUT 2 #define PIN_PDN_PREV 3 +#define PIN_IN(_pin, _pull, _drv) \ + _pin { \ + samsung,pins = #_pin; \ + samsung,pin-function = <0>; \ + samsung,pin-pud = ; \ + samsung,pin-drv = ; \ + } + +#define PIN_OUT(_pin, _drv) \ + _pin { \ + samsung,pins = #_pin; \ + samsung,pin-function = <1>; \ + samsung,pin-pud = <0>; \ + samsung,pin-drv = ; \ + } + +#define PIN_OUT_SET(_pin, _val, _drv) \ + _pin { \ + samsung,pins = #_pin; \ + samsung,pin-function = <1>; \ + samsung,pin-pud = <0>; \ + samsung,pin-drv = ; \ + samsung,pin-val = <_val>; \ + } + +#define PIN_CFG(_pin, _sel, _pull, _drv) \ + _pin { \ + samsung,pins = #_pin; \ + samsung,pin-function = <_sel>; \ + samsung,pin-pud = ; \ + samsung,pin-drv = ; \ + } + #define PIN_SLP(_pin, _mode, _pull) \ _pin { \ samsung,pins = #_pin; \ diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index 3e64d5dcdd60..a01e61b20385 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -681,7 +681,21 @@ &pinctrl_0 { pinctrl-names = "default"; - pinctrl-0 = <&sleep0>; + pinctrl-0 = <&initial0 &sleep0>; + + initial0: initial-state { + PIN_IN(gpa1-4, DOWN, LV1); + PIN_IN(gpa1-5, DOWN, LV1); + + PIN_IN(gpc0-0, DOWN, LV1); + PIN_IN(gpc0-1, DOWN, LV1); + PIN_IN(gpc0-2, DOWN, LV1); + PIN_IN(gpc0-3, DOWN, LV1); + PIN_IN(gpc0-4, DOWN, LV1); + + PIN_IN(gpd0-0, DOWN, LV1); + PIN_IN(gpd0-1, DOWN, LV1); + }; sleep0: sleep-state { PIN_SLP(gpa0-0, INPUT, DOWN); @@ -735,7 +749,60 @@ &pinctrl_1 { pinctrl-names = "default"; - pinctrl-0 = <&sleep1>; + pinctrl-0 = <&initial1 &sleep1>; + + initial1: initial-state { + PIN_IN(gpe0-6, DOWN, LV1); + PIN_IN(gpe0-7, DOWN, LV1); + + PIN_IN(gpe1-0, DOWN, LV1); + PIN_IN(gpe1-3, DOWN, LV1); + PIN_IN(gpe1-4, DOWN, LV1); + PIN_IN(gpe1-5, DOWN, LV1); + PIN_IN(gpe1-6, DOWN, LV1); + + PIN_IN(gpk2-0, DOWN, LV1); + PIN_IN(gpk2-1, DOWN, LV1); + PIN_IN(gpk2-2, DOWN, LV1); + PIN_IN(gpk2-3, DOWN, LV1); + PIN_IN(gpk2-4, DOWN, LV1); + PIN_IN(gpk2-5, DOWN, LV1); + PIN_IN(gpk2-6, DOWN, LV1); + + PIN_IN(gpm0-0, DOWN, LV1); + PIN_IN(gpm0-1, DOWN, LV1); + PIN_IN(gpm0-2, DOWN, LV1); + PIN_IN(gpm0-3, DOWN, LV1); + PIN_IN(gpm0-4, DOWN, LV1); + PIN_IN(gpm0-5, DOWN, LV1); + PIN_IN(gpm0-6, DOWN, LV1); + PIN_IN(gpm0-7, DOWN, LV1); + + PIN_IN(gpm1-0, DOWN, LV1); + PIN_IN(gpm1-1, DOWN, LV1); + PIN_IN(gpm1-2, DOWN, LV1); + PIN_IN(gpm1-3, DOWN, LV1); + PIN_IN(gpm1-4, DOWN, LV1); + PIN_IN(gpm1-5, DOWN, LV1); + PIN_IN(gpm1-6, DOWN, LV1); + + PIN_IN(gpm2-0, DOWN, LV1); + PIN_IN(gpm2-1, DOWN, LV1); + + PIN_IN(gpm3-0, DOWN, LV1); + PIN_IN(gpm3-1, DOWN, LV1); + PIN_IN(gpm3-2, DOWN, LV1); + PIN_IN(gpm3-3, DOWN, LV1); + PIN_IN(gpm3-4, DOWN, LV1); + + PIN_IN(gpm4-1, DOWN, LV1); + PIN_IN(gpm4-2, DOWN, LV1); + PIN_IN(gpm4-3, DOWN, LV1); + PIN_IN(gpm4-4, DOWN, LV1); + PIN_IN(gpm4-5, DOWN, LV1); + PIN_IN(gpm4-6, DOWN, LV1); + PIN_IN(gpm4-7, DOWN, LV1); + }; sleep1: sleep-state { PIN_SLP(gpe0-0, PREV, NONE);