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Tue, 15 Mar 2016 11:08:17 +0900 (KST) From: Chanwoo Choi To: k.kozlowski@samsung.com, kgene@kernel.org, s.nawrocki@samsung.com, tomasz.figa@gmail.com Subject: [PATCH v2 3/7] ARM: dts: Add UART2 dt node for Exynos3250 SoC Date: Tue, 15 Mar 2016 11:08:11 +0900 Message-id: <1458007695-3627-4-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1458007695-3627-1-git-send-email-cw00.choi@samsung.com> References: <1458007695-3627-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrLLMWRmVeSWpSXmKPExsWyRsSkWHdi3vMwg22bVCy2H3nGanH9y3NW i/lHzrFaTLo/gcXixq82VovXLwwt+h+/ZrbY9Pgaq8XlXXPYLGac38dksWjrF3aLw2/aWS1m TH7JZrFq1x9GBz6PnbPusntsWtXJ5rF5Sb1H35ZVjB6fN8kFsEZx2aSk5mSWpRbp2yVwZfy6 eIqp4CtfxaQ//1kbGKfydDFyckgImEhMerKTFcIWk7hwbz1bFyMXh5DACkaJFzc2sMAUHf1x lgkiMYtR4vvr3ywQzhdGic/Tv4FVsQloSex/cYMNxBYRiJOYeBHCZhaYxSQxb34hiC0s4CZx 7/cuZhCbRUBVYmL/NDCbV8BF4tW5dcwQ2+QkPux5xA5icwq4Sqy48RFsvhBQzaIVbWDnSQic Y5c4/PE/C8QgAYlvkw8B2RxACVmJTQeg5khKHFxxg2UCo/ACRoZVjKKpBckFxUnpRcZ6xYm5 xaV56XrJ+bmbGIGxcvrfs/4djHcPWB9iFOBgVOLhnSH1PEyINbGsuDL3EKMp0IaJzFKiyfnA iMwriTc0NjOyMDUxNTYytzRTEuddKPUzWEggPbEkNTs1tSC1KL6oNCe1+BAjEwenVAPjFP/o c/+EdEOP8nuKpkZzzbiS9aqwY650XOv5bIHQiW+6LTOPp4Q/e1a0XvLzrnVTOCZXK65vCWe7 vzD1faP74429MvKtFcsyH5+9XRt+vfrPDSY93t6ELcIcdd59xmuK/u+OkPn07eKhaREsiw9M m8sexnXvszjTuZS2kgyLN/JtW1WMzrsrsRRnJBpqMRcVJwIA6mYtLJACAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrFIsWRmVeSWpSXmKPExsVy+t9jQd2Jec/DDHqvy1lsP/KM1eL6l+es FvOPnGO1mHR/AovFjV9trBavXxha9D9+zWyx6fE1VovLu+awWcw4v4/JYtHWL+wWh9+0s1rM mPySzWLVrj+MDnweO2fdZffYtKqTzWPzknqPvi2rGD0+b5ILYI1qYLTJSE1MSS1SSM1Lzk/J zEu3VfIOjneONzUzMNQ1tLQwV1LIS8xNtVVy8QnQdcvMATpUSaEsMacUKBSQWFyspG+HaUJo iJuuBUxjhK5vSBBcj5EBGkhYw5jx6+IppoKvfBWT/vxnbWCcytPFyMkhIWAicfTHWSYIW0zi wr31bF2MXBxCArMYJb6//s0C4XxhlPg8/RsLSBWbgJbE/hc32EBsEYE4iYkXIWxmgVlMEvPm F4LYwgJuEvd+72IGsVkEVCUm9k8Ds3kFXCRenVvHDLFNTuLDnkfsIDangKvEihsfweYLAdUs WtHGNoGRdwEjwypGidSC5ILipPRco7zUcr3ixNzi0rx0veT83E2M4Hh8Jr2D8fAu90OMAhyM Sjy8M6SehwmxJpYVV+YeYpTgYFYS4U1IAArxpiRWVqUW5ccXleakFh9iNAU6bCKzlGhyPjBV 5JXEGxqbmBlZGpkbWhgZmyuJ8z7+vy5MSCA9sSQ1OzW1ILUIpo+Jg1OqgdHAIIOXo+B86okX wiWMP7p639eLL7b00uXWOPClpLrg1g3DQyu61XVnvfz/L3N/4c4DvyY+koi0zTj/jruvZM+6 SNatS7fJhB27fexuV8O8Fd8Zl092/JQ6zen02p6PMd869iVZCb4PWcT9bMZ69qbo9GuST08z q39P0Yqzldl//5TgUscPXPVKLMUZiYZazEXFiQAy9iCY3QIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160314_190842_788209_089E8596 X-CRM114-Status: GOOD ( 10.73 ) X-Spam-Score: -6.9 (------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: inki.dae@samsung.com, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, pankaj.dubey@samsung.com, sw0312.kim@samsung.com, linux-kernel@vger.kernel.org, andi.shyti@samsung.com, jh80.chung@samsung.com, cw00.choi@samsung.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RDNS_NONE,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Pankaj Dubey This patch add the uart2 devicetree node for Exynos3250 SoC. Cc: Kukjin Kim Cc: Krzysztof Kozlowski Signed-off-by: Pankaj Dubey Signed-off-by: Chanwoo Choi Reviewed-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 7 +++++++ arch/arm/boot/dts/exynos3250.dtsi | 12 ++++++++++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index ecf79386e891..54c587f27265 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -158,6 +158,13 @@ samsung,pin-drv = <0>; }; + uart2_data: uart2-data { + samsung,pins = "gpa1-0", "gpa1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + i2c3_bus: i2c3-bus { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <3>; diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 18e3deffbf48..076677384d20 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -42,6 +42,7 @@ i2c7 = &i2c_7; serial0 = &serial_0; serial1 = &serial_1; + serial2 = &serial_2; }; cpus { @@ -465,6 +466,17 @@ status = "disabled"; }; + serial_2: serial@13820000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x13820000 0x100>; + interrupts = <0 111 0>; + clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>; + clock-names = "uart", "clk_uart_baud0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_data>; + status = "disabled"; + }; + i2c_0: i2c@13860000 { #address-cells = <1>; #size-cells = <0>;