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Tue, 15 Mar 2016 16:38:13 +0900 (KST) From: Chanwoo Choi To: k.kozlowski@samsung.com, kgene@kernel.org, s.nawrocki@samsung.com, tomasz.figa@gmail.com Subject: [PATCH v3 4/8] ARM: dts: Add UART2 dt node for Exynos3250 SoC Date: Tue, 15 Mar 2016 16:38:06 +0900 Message-id: <1458027490-13787-5-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1458027490-13787-1-git-send-email-cw00.choi@samsung.com> References: <1458027490-13787-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrFLMWRmVeSWpSXmKPExsWyRsSkUPfp7udhBgv2y1psP/KM1eL6l+es FvOPnGO1mHR/AovFjV9trBavXxha9D9+zWyx6fE1VovLu+awWcw4v4/JYtHWL+wWh9+0s1rM mPySzWLVrj+MDnweO2fdZffYtKqTzWPzknqPvi2rGD0+b5ILYI3isklJzcksSy3St0vgyvh1 8RRTwVe+ikl//rM2ME7l6WLk5JAQMJF4/HM7E4QtJnHh3nq2LkYuDiGBFYwSr2feB3I4wIqu nbQHqRESWMoo8fuMAIT9hVHiWqMxiM0moCWx/8UNNhBbRCBOYuJFCJtZYBaTxLz5hSC2sICb xL9p35hBbBYBVYl1k7vAangFXCUOHb7FBnGDnMSHPY/YQWxOoPrTV+8zQuxylTi3Yh0LyG0S AsfYJa4/fs0EMUhA4tvkQywQd8pKbDrADDFHUuLgihssExiFFzAyrGIUTS1ILihOSi8y1CtO zC0uzUvXS87P3cQIjJLT/5717mC8fcD6EKMAB6MSD+8MqedhQqyJZcWVuYcYTYE2TGSWEk3O B8ZiXkm8obGZkYWpiamxkbmlmZI4r6LUz2AhgfTEktTs1NSC1KL4otKc1OJDjEwcnFINjBUX njx+xNfUdnh9py6zKcvrq5POHbreuXbxj739Qs0VJh+3muWvfcur+GM2T2vvbDPG5jb51SwM glcvNGz2DHluFrJubYHghwvbWHN90kpnbvd+vH5HbDePvVCn9rI/K++fODfd99KSwJQc8YDT JovmT9sz7cHq8+WPnty7VmTCV/+56bbUzUolluKMREMt5qLiRACOrd0xjQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrOIsWRmVeSWpSXmKPExsVy+t9jAd2nu5+HGTxukrDYfuQZq8X1L89Z LeYfOcdqMen+BBaLG7/aWC1evzC06H/8mtli0+NrrBaXd81hs5hxfh+TxaKtX9gtDr9pZ7WY Mfklm8WqXX8YHfg8ds66y+6xaVUnm8fmJfUefVtWMXp83iQXwBrVwGiTkZqYklqkkJqXnJ+S mZduq+QdHO8cb2pmYKhraGlhrqSQl5ibaqvk4hOg65aZA3SokkJZYk4pUCggsbhYSd8O04TQ EDddC5jGCF3fkCC4HiMDNJCwhjHj18VTTAVf+Som/fnP2sA4laeLkYNDQsBE4tpJ+y5GTiBT TOLCvfVsILaQwFJGid9nBCDsL4wS1xqNQWw2AS2J/S9ugNWICMRJTLwIYTMLzGKSmDe/EMQW FnCT+DftGzOIzSKgKrFuchdYDa+Aq8Shw7fYIHbJSXzY84gdxOYEqj999T4jxC5XiXMr1rFM YORdwMiwilEitSC5oDgpPdcoL7Vcrzgxt7g0L10vOT93EyM4Ep9J72A8vMv9EKMAB6MSD+8M qedhQqyJZcWVuYcYJTiYlUR43XYBhXhTEiurUovy44tKc1KLDzGaAh02kVlKNDkfmCTySuIN jU3MjCyNzA0tjIzNlcR5H/9fFyYkkJ5YkpqdmlqQWgTTx8TBKdXA2FRr8fnTybvLXfQzZjzZ uPjsz0nu2mekCuZnvFj4b3ne1d1OZ1u3xMhnc03ye+cr/WNZpMIMwfYkq4mhfgfl2dnmvpYX Nd+ssWW+ciHPUtbz1gnF5y6sXmu9r1GTVTj0X4ayUlRU65P/W978Oh2+8Z3e0cK2LpneY/Yl 6RW3Gat2+zXP4mWuVGIpzkg01GIuKk4EADT1BZ/aAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160315_003838_455538_CB1EB587 X-CRM114-Status: GOOD ( 10.52 ) X-Spam-Score: -6.9 (------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: inki.dae@samsung.com, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, pankaj.dubey@samsung.com, sw0312.kim@samsung.com, linux-kernel@vger.kernel.org, andi.shyti@samsung.com, jh80.chung@samsung.com, cw00.choi@samsung.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RDNS_NONE,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Pankaj Dubey This patch add the uart2 devicetree node for Exynos3250 SoC. Cc: Kukjin Kim Cc: Krzysztof Kozlowski Signed-off-by: Pankaj Dubey Signed-off-by: Chanwoo Choi Reviewed-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 7 +++++++ arch/arm/boot/dts/exynos3250.dtsi | 12 ++++++++++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index ecf79386e891..54c587f27265 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -158,6 +158,13 @@ samsung,pin-drv = <0>; }; + uart2_data: uart2-data { + samsung,pins = "gpa1-0", "gpa1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + i2c3_bus: i2c3-bus { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <3>; diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 18e3deffbf48..076677384d20 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -42,6 +42,7 @@ i2c7 = &i2c_7; serial0 = &serial_0; serial1 = &serial_1; + serial2 = &serial_2; }; cpus { @@ -465,6 +466,17 @@ status = "disabled"; }; + serial_2: serial@13820000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x13820000 0x100>; + interrupts = <0 111 0>; + clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>; + clock-names = "uart", "clk_uart_baud0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_data>; + status = "disabled"; + }; + i2c_0: i2c@13860000 { #address-cells = <1>; #size-cells = <0>;