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Thu, 24 Mar 2016 13:25:35 +0900 (KST) From: Chanwoo Choi To: myungjoo.ham@samsung.com, kyungmin.park@samsung.com, k.kozlowski@samsung.com, kgene@kernel.org Subject: [PATCH v5 21/21] ARM: dts: Add support of bus frequency for exynos4412-trats/odroidu3 Date: Thu, 24 Mar 2016 13:25:30 +0900 Message-id: <1458793530-31897-22-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1458793530-31897-1-git-send-email-cw00.choi@samsung.com> References: <1458793530-31897-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrAIsWRmVeSWpSXmKPExsWyRsSkWNc+53OYQetEJYvrX56zWsw/co7V ov/NQlaLc69WMlq8fmFo0f/4NbPF2aY37BabHl9jtbi8aw6bxefeI4wWM87vY7JYt/EWu8Xt y7wWS69fZLK43biCzWLC9LUsFmdOX2K1aN17hN2ibfUHVgdhjzXz1jB6tDT3sHlc7utl8tg5 6y67x8rlX9g8Nq3qZPPYvKTe498xdo8tV9tZPPq2rGL0+LxJLoA7issmJTUnsyy1SN8ugSvj wLabLAX7RStu7n7P1sC4U7CLkYNDQsBE4sFD6S5GTiBTTOLCvfVsXYxcHEICKxglHm86yART c2BTKUR8KaPEg23PoIq+MEpMmHSLEaSbTUBLYv+LG2wgtohAisTjhyfBipgFpjBLLJ/ezAKS EBZIkDh/5TtYEYuAqsS81a1sIBt4Bdwkbky2gLhCTuLDnkfsIDYnUHhqQxNYq5CAq8TTx5tY QWZKCMzlkFgx+TIzxBwBiW+TD7FAXCorsekAM8QcSYmDK26wTGAUXsDIsIpRNLUguaA4Kb3I SK84Mbe4NC9dLzk/dxMjMCJP/3vWt4Px5gHrQ4wCHIxKPLwNHJ/DhFgTy4orcw8xmgJtmMgs JZqcD4z7vJJ4Q2MzIwtTE1NjI3NLMyVx3gSpn8FCAumJJanZqakFqUXxRaU5qcWHGJk4OKUa GNXjglfe/h23msHA/GBR2+Po0NYgt8Mn1snKf1b9ayi77bLtz3nqr+av/3byvvPFptUreXZt n+rnuWpPlfYnjp3zAjMYY62eConYiaSeTVrVvWiG7SPxWI1/xZO/H+zd0Wh7bKJu0ZR9VVtW XmdNard8vqbxcLf3YZvI/mz3NWvcWGbv3lRabqXEUpyRaKjFXFScCABdYOKawwIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrHIsWRmVeSWpSXmKPExsVy+t9jAV37nM9hBodeSVtc//Kc1WL+kXOs Fv1vFrJanHu1ktHi9QtDi/7Hr5ktzja9YbfY9Pgaq8XlXXPYLD73HmG0mHF+H5PFuo232C1u X+a1WHr9IpPF7cYVbBYTpq9lsThz+hKrReveI+wWbas/sDoIe6yZt4bRo6W5h83jcl8vk8fO WXfZPVYu/8LmsWlVJ5vH5iX1Hv+OsXtsudrO4tG3ZRWjx+dNcgHcUQ2MNhmpiSmpRQqpecn5 KZl56bZK3sHxzvGmZgaGuoaWFuZKCnmJuam2Si4+AbpumTlA3ykplCXmlAKFAhKLi5X07TBN CA1x07WAaYzQ9Q0JgusxMkADCWsYMw5su8lSsF+04ubu92wNjDsFuxg5OCQETCQObCrtYuQE MsUkLtxbz9bFyMUhJLCUUeLBtmdQzhdGiQmTbjGCVLEJaEnsf3GDDcQWEUiRePzwJFgRs8AU Zonl05tZQBLCAgkS5698BytiEVCVmLe6lQ1kG6+Am8SNyRYQ2+QkPux5xA5icwKFpzY0gbUK CbhKPH28iXUCI+8CRoZVjBKpBckFxUnpuUZ5qeV6xYm5xaV56XrJ+bmbGMFx/0x6B+PhXe6H GAU4GJV4eG9wfQ4TYk0sK67MPcQowcGsJMK7PhwoxJuSWFmVWpQfX1Sak1p8iNEU6K6JzFKi yfnAlJRXEm9obGJmZGlkbmhhZGyuJM77+P+6MCGB9MSS1OzU1ILUIpg+Jg5OqQbG+O+LgibP KYzV13utybp3f3/UW2HmwoKemaKijlPeNn+r3Lt4/YSfnlfv/r6o0PhX5/srRWWeu9d+bz+x c46NmfamVF9m4/umZR98s+bmVfl8qAhdt1dpEc/pKLadhmbFs7Zsm8b4PVYlg7/x4jaVr9pv 7e6brXIKY3H5tOFSS+FN7UP+/u9alFiKMxINtZiLihMBQaaLgBEDAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160323_212601_739072_9CB91E97 X-CRM114-Status: GOOD ( 10.74 ) X-Spam-Score: -6.9 (------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux@arm.linux.org.uk, cw00.choi@samsung.com, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, linux.amoon@gmail.com, linux-pm@vger.kernel.org, rjw@rjwysocki.net, linux-kernel@vger.kernel.org, tjakobi@math.uni-bielefeld.de, robh+dt@kernel.org, galak@codeaurora.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP THis patch adds the bus device tree nodes for both MIF (Memory) and INT (Internal) block to enable the bus frequency. The DMC bus is parent device in MIF block using VDD_MIF and the LEFTBUS bus is parent device in INT block using VDD_INT. Signed-off-by: Chanwoo Choi Reviewed-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 47 +++++++++++++++++++++++++ arch/arm/boot/dts/exynos4412-trats2.dts | 47 +++++++++++++++++++++++++ 2 files changed, 94 insertions(+) diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index b4983cbc4f8c..2015f10071f9 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -109,6 +109,53 @@ }; }; +&bus_dmc { + devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>; + vdd-supply = <&buck1_reg>; + status = "okay"; +}; + +&bus_acp { + devfreq = <&bus_dmc>; + status = "okay"; +}; + +&bus_c2c { + devfreq = <&bus_dmc>; + status = "okay"; +}; + +&bus_leftbus { + devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>; + vdd-supply = <&buck3_reg>; + status = "okay"; +}; + +&bus_rightbus { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + +&bus_display { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + +&bus_fsys { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + +&bus_peri { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + +&bus_mfc { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + &cpu0 { cpu0-supply = <&buck2_reg>; }; diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index dce3cebe0606..9f3fb9a7f5f4 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -289,6 +289,53 @@ status = "okay"; }; +&bus_dmc { + devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>; + vdd-supply = <&buck1_reg>; + status = "okay"; +}; + +&bus_acp { + devfreq = <&bus_dmc>; + status = "okay"; +}; + +&bus_c2c { + devfreq = <&bus_dmc>; + status = "okay"; +}; + +&bus_leftbus { + devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>; + vdd-supply = <&buck3_reg>; + status = "okay"; +}; + +&bus_rightbus { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + +&bus_display { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + +&bus_fsys { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + +&bus_peri { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + +&bus_mfc { + devfreq = <&bus_leftbus>; + status = "okay"; +}; + &cpu0 { cpu0-supply = <&buck2_reg>; };