From patchwork Thu Mar 24 16:50:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 8663001 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7E4D39F326 for ; Thu, 24 Mar 2016 16:58:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5845F201FA for ; Thu, 24 Mar 2016 16:58:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 36B7720114 for ; Thu, 24 Mar 2016 16:58:01 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aj8YI-0000iF-AP; Thu, 24 Mar 2016 16:56:06 +0000 Received: from mail-wm0-x231.google.com ([2a00:1450:400c:c09::231]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aj8TV-00047w-J4 for linux-arm-kernel@lists.infradead.org; Thu, 24 Mar 2016 16:51:13 +0000 Received: by mail-wm0-x231.google.com with SMTP id p65so74602586wmp.0 for ; Thu, 24 Mar 2016 09:50:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Tl/IBhjSxIpqPVPFVWY9/3DU8PxqTPsdhruBXN6MfkM=; b=YeVaekNNlHnvHnmbfIoc5USt3pGKlvREO5AUZyCUD8DwuzI7ODLG1AfAxWG6SwUVUU yswbx4JJaf61LMIrP3+s8dMxEfFXaOmqbAwXSwIURprr1AYInDPrH40A08E/Qahpg44p H2UsskkjZ4P24UmS4L58hmSwfl6tig/1d8M+FlFDO/RJAEvAJ2iuoK0W0RO/Rk5jqaBg tez5qTFZ6H3UngqexnGT0eizxS78H+9+wbFOHD0bnkZdvt99kSnTwTIg14LF3I/b4hEN pGWie7wTBKl07/k8l530ybEQp0JwV1tYNNa4T0XqxOik07x/slTNrRWLvrhwTX8Z2bUg LY+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Tl/IBhjSxIpqPVPFVWY9/3DU8PxqTPsdhruBXN6MfkM=; b=VpFC6NIL3VM1716Oy8LKo+KKFORNWJnDx8yc+AGMK1e24trhiC6IQG4Ytz9bAxxJ2O JlE/+q/zeAkACAOKvT/Fp9wL7SCTT7+ufmdsnkonv38wV/rh1gvs7hMrGtpgQmpko0T0 bvx5TIz4orpCA0Hw9f7HVZmvNN1hoB9SnovnQnK+BzL6LgJtGH31HtghHYwltejtwrye QEzO4WIunthESlCpClbWVK7nSro/P5qz67IQg53ZbnG7LQJgthkyl4RdLE5DnH0BsYwG 0QIMXxSIzcDZ9THHrfuuZ/WkXig/5ZRlK/SjaZDV3Y7TOWntJaysNZ3LuUVjsF7vY8Uv WRjg== X-Gm-Message-State: AD7BkJLc24nISeq9tiXOF6c+PVASzsTeLuqS/jd+OT2iF5u5u9KEqTZb35l2eNSoETs6rSqV X-Received: by 10.194.103.227 with SMTP id fz3mr10837030wjb.43.1458838248099; Thu, 24 Mar 2016 09:50:48 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id lz5sm8177545wjb.5.2016.03.24.09.50.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 24 Mar 2016 09:50:47 -0700 (PDT) From: Neil Armstrong To: linux-kernel@vger.kernel.org, linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, sboyd@codeaurora.org Subject: [PATCH v3 09/18] clk: Add PLX Technology OXNAS Standard Clocks Date: Thu, 24 Mar 2016 17:50:06 +0100 Message-Id: <1458838215-23314-10-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1458838215-23314-1-git-send-email-narmstrong@baylibre.com> References: <1458838215-23314-1-git-send-email-narmstrong@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160324_095110_146321_2A739986 X-CRM114-Status: GOOD ( 21.75 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add PLX Technology OXNAS SoC Family Standard Clocks support. Signed-off-by: Neil Armstrong --- drivers/clk/Kconfig | 6 ++ drivers/clk/Makefile | 1 + drivers/clk/clk-oxnas.c | 202 ++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 209 insertions(+) create mode 100644 drivers/clk/clk-oxnas.c diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 16f7d33..2efdbab 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -197,6 +197,12 @@ config COMMON_CLK_PXA ---help--- Support for the Marvell PXA SoC. +config COMMON_CLK_OXNAS + bool + select MFD_SYSCON + ---help--- + Support for the OXNAS SoC Family clocks. + source "drivers/clk/bcm/Kconfig" source "drivers/clk/hisilicon/Kconfig" source "drivers/clk/mvebu/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 46869d6..627da26 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_ARCH_MB86S7X) += clk-mb86s7x.o obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o +obj-$(CONFIG_COMMON_CLK_OXNAS) += clk-oxnas.o obj-$(CONFIG_COMMON_CLK_PALMAS) += clk-palmas.o obj-$(CONFIG_CLK_QORIQ) += clk-qoriq.o obj-$(CONFIG_COMMON_CLK_RK808) += clk-rk808.o diff --git a/drivers/clk/clk-oxnas.c b/drivers/clk/clk-oxnas.c new file mode 100644 index 0000000..5f02cfa --- /dev/null +++ b/drivers/clk/clk-oxnas.c @@ -0,0 +1,202 @@ +/* + * Copyright (C) 2010 Broadcom + * Copyright (C) 2012 Stephen Warren + * Copyright (C) 2016 Neil Armstrong + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* Standard regmap gate clocks */ +struct clk_oxnas { + struct clk_hw hw; + signed char bit; + struct regmap *regmap; +}; + +/* Regmap offsets */ +#define CLK_STAT_REGOFFSET 0x24 +#define CLK_SET_REGOFFSET 0x2c +#define CLK_CLR_REGOFFSET 0x30 + +static inline struct clk_oxnas *to_clk_oxnas(struct clk_hw *hw) +{ + return container_of(hw, struct clk_oxnas, hw); +} + +static int oxnas_clk_is_enabled(struct clk_hw *hw) +{ + struct clk_oxnas *std = to_clk_oxnas(hw); + int ret; + unsigned int val; + + ret = regmap_read(std->regmap, CLK_STAT_REGOFFSET, &val); + if (ret < 0) + return ret; + + return val & BIT(std->bit); +} + +static int oxnas_clk_enable(struct clk_hw *hw) +{ + struct clk_oxnas *std = to_clk_oxnas(hw); + + regmap_write(std->regmap, CLK_SET_REGOFFSET, BIT(std->bit)); + + return 0; +} + +static void oxnas_clk_disable(struct clk_hw *hw) +{ + struct clk_oxnas *std = to_clk_oxnas(hw); + + regmap_write(std->regmap, CLK_CLR_REGOFFSET, BIT(std->bit)); +} + +static const struct clk_ops oxnas_clk_ops = { + .enable = oxnas_clk_enable, + .disable = oxnas_clk_disable, + .is_enabled = oxnas_clk_is_enabled, +}; + +static const char *const oxnas_clk_parents[] = { + "oscillator", +}; + +static const char *const eth_parents[] = { + "gmacclk", +}; + +#define DECLARE_STD_CLKP(__clk, __parent) \ +static const struct clk_init_data clk_##__clk##_init = { \ + .name = __stringify(__clk), \ + .ops = &oxnas_clk_ops, \ + .parent_names = __parent, \ + .num_parents = ARRAY_SIZE(__parent), \ +} + +#define DECLARE_STD_CLK(__clk) DECLARE_STD_CLKP(__clk, oxnas_clk_parents) + +/* Clk init data declaration */ +DECLARE_STD_CLK(leon); +DECLARE_STD_CLK(dma_sgdma); +DECLARE_STD_CLK(cipher); +DECLARE_STD_CLK(sata); +DECLARE_STD_CLK(audio); +DECLARE_STD_CLK(usbmph); +DECLARE_STD_CLKP(etha, eth_parents); +DECLARE_STD_CLK(pciea); +DECLARE_STD_CLK(nand); + +/* Bit - Name association */ +static const struct clk_init_data *clk_oxnas_init[] = { + [0] = &clk_leon_init, + [1] = &clk_dma_sgdma_init, + [2] = &clk_cipher_init, + [3] = NULL, /* Do not touch to DDR clock */ + [4] = &clk_sata_init, + [5] = &clk_audio_init, + [6] = &clk_usbmph_init, + [7] = &clk_etha_init, + [8] = &clk_pciea_init, + [9] = &clk_nand_init, +}; + +static int oxnas_stdclk_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct regmap *regmap; + struct clk_oxnas *clk_oxnas; + struct clk_onecell_data *onecell_data; + struct clk **clks; + unsigned int clks_count = 0; + int i; + + clk_oxnas = devm_kzalloc(&pdev->dev, + sizeof(*clk_oxnas)*ARRAY_SIZE(clk_oxnas_init), + GFP_KERNEL); + if (!clk_oxnas) + return -ENOMEM; + + clks = devm_kzalloc(&pdev->dev, + sizeof(*clks)*ARRAY_SIZE(clk_oxnas_init), + GFP_KERNEL); + if (!clks) + return -ENOMEM; + + onecell_data = devm_kzalloc(&pdev->dev, sizeof(*onecell_data), + GFP_KERNEL); + if (!onecell_data) + return -ENOMEM; + + regmap = syscon_node_to_regmap(of_get_parent(np)); + if (!regmap) { + dev_err(&pdev->dev, "failed to have parent regmap\n"); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(clk_oxnas_init); i++) { + struct clk_oxnas *_clk; + + if (!clk_oxnas_init[i]) + continue; + + _clk = &clk_oxnas[i]; + _clk->bit = i; + _clk->hw.init = clk_oxnas_init[i]; + _clk->regmap = regmap; + + clks[clks_count] = devm_clk_register(&pdev->dev, &_clk->hw); + if (WARN_ON(IS_ERR(clks[clks_count]))) + return PTR_ERR(clks[clks_count]); + + ++clks_count; + } + + onecell_data->clks = clks; + onecell_data->clk_num = clks_count; + + return of_clk_add_provider(np, of_clk_src_onecell_get, onecell_data); +} + +static int oxnas_stdclk_remove(struct platform_device *pdev) +{ + of_clk_del_provider(pdev->dev.of_node); + + return 0; +} + +static const struct of_device_id oxnas_stdclk_dt_ids[] = { + { .compatible = "oxsemi,ox810se-stdclk" }, + { } +}; +MODULE_DEVICE_TABLE(of, oxnas_stdclk_dt_ids); + +static struct platform_driver oxnas_stdclk_driver = { + .probe = oxnas_stdclk_probe, + .remove = oxnas_stdclk_remove, + .driver = { + .name = "oxnas-stdclk", + .of_match_table = of_match_ptr(oxnas_stdclk_dt_ids), + }, +}; + +module_platform_driver(oxnas_stdclk_driver);