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Thu, 31 Mar 2016 11:48:10 +0900 (KST) From: Chanwoo Choi To: k.kozlowski@samsung.com, kgene@kernel.org, s.nawrocki@samsung.com, tomasz.figa@gmail.com Subject: [PATCH v4 5/9] ARM: dts: Add UART2 dt node for Exynos3250 SoC Date: Thu, 31 Mar 2016 11:48:01 +0900 Message-id: <1459392485-11327-6-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1459392485-11327-1-git-send-email-cw00.choi@samsung.com> References: <1459392485-11327-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrDLMWRmVeSWpSXmKPExsWyRsSkQPdV/58wg+e3lS22H3nGanH9y3NW i/lHzrFaTLo/gcXixq82VovXLwwt+h+/ZrbY9Pgaq8XlXXPYLGac38dksWjrF3aLw2/aWS1m TH7JZrFq1x9GBz6PnbPusntsWtXJ5rF5Sb1H35ZVjB6fN8kFsEZx2aSk5mSWpRbp2yVwZfRe yiv4ylcxa/1vpgbGqTxdjJwcEgImEtcOLGWCsMUkLtxbz9bFyMUhJLCCUWLHhi+MMEWrps5j hUjMYpR4/+osO4TzhVFi3fLvYFVsAloS+1/cYAOxRQTiJCZehLCZBWYxScybXwhiCwu4SXy+ 9ASsnkVAVeLwzQWsIDavgKvE68f72CC2yUl82POIHcTmBKq/t+IymC0EVLNm5hxmkMUSAqfY JVZt/sUCMUhA4tvkQ0A2B1BCVmLTAWaIOZISB1fcYJnAKLyAkWEVo2hqQXJBcVJ6kZFecWJu cWleul5yfu4mRmCknP73rG8H480D1ocYBTgYlXh4NdL+hAmxJpYVV+YeYjQF2jCRWUo0OR8Y j3kl8YbGZkYWpiamxkbmlmZK4rwJUj+DhQTSE0tSs1NTC1KL4otKc1KLDzEycXBKNTDqFa0p 49u37Mvvn09r3lXLnl1555JHIv/S6PkdOU/rFVPCOCL3Gp1RYvE6H7jgtuCEJ+0b+10+Bu2S //h6Tjj7N1/jG937ub/zaq5hDJ9wqmrfDdY+nVXX6rt0JVbvrnLvPPzQzfp1oBDHhE7lmsz2 pu8FR/4vaF8TdqggOudEr3my+4lufx8lluKMREMt5qLiRABXa8ZQjwIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrJIsWRmVeSWpSXmKPExsVy+t9jQd1X/X/CDA60y1lsP/KM1eL6l+es FvOPnGO1mHR/AovFjV9trBavXxha9D9+zWyx6fE1VovLu+awWcw4v4/JYtHWL+wWh9+0s1rM mPySzWLVrj+MDnweO2fdZffYtKqTzWPzknqPvi2rGD0+b5ILYI1qYLTJSE1MSS1SSM1Lzk/J zEu3VfIOjneONzUzMNQ1tLQwV1LIS8xNtVVy8QnQdcvMATpUSaEsMacUKBSQWFyspG+HaUJo iJuuBUxjhK5vSBBcj5EBGkhYw5jReymv4Ctfxaz1v5kaGKfydDFyckgImEismjqPFcIWk7hw bz1bFyMXh5DALEaJ96/OskM4Xxgl1i3/zghSxSagJbH/xQ02EFtEIE5i4kUIm1lgFpPEvPmF ILawgJvE50tPwOpZBFQlDt9cALaBV8BV4vXjfWwQ2+QkPux5xA5icwLV31txGcwWAqpZM3MO 8wRG3gWMDKsYJVILkguKk9JzjfJSy/WKE3OLS/PS9ZLzczcxgqPxmfQOxsO73A8xCnAwKvHw Xkj+EybEmlhWXJl7iFGCg1lJhDe0DyjEm5JYWZValB9fVJqTWnyI0RTosInMUqLJ+cBEkVcS b2hsYmZkaWRuaGFkbK4kzvv4/7owIYH0xJLU7NTUgtQimD4mDk6pBkaORQweoaVxH055Bmaz /56VJGX1pG3mL6nNXipnJHynL099MbM2SKw+8mRQ67ETHLPlkhKPiZ6XDbp57Ilzz8o7/k6L 3ub8DJy9Uv2iXJprqaTub+m7MTpvN+xJYLvzcHecWphar/U83j9dXEZOVuq9f1f1Lj+RmXpI Q1jro+60Q4FfeBcyLVBiKc5INNRiLipOBAAgWQOq3AIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160330_194835_197348_073EA8A0 X-CRM114-Status: GOOD ( 11.08 ) X-Spam-Score: -7.9 (-------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: inki.dae@samsung.com, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, pankaj.dubey@samsung.com, sw0312.kim@samsung.com, linux-kernel@vger.kernel.org, andi.shyti@samsung.com, jh80.chung@samsung.com, cw00.choi@samsung.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Pankaj Dubey This patch add the uart2 devicetree node for Exynos3250 SoC. Cc: Kukjin Kim Cc: Krzysztof Kozlowski Signed-off-by: Pankaj Dubey Signed-off-by: Chanwoo Choi Reviewed-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 7 +++++++ arch/arm/boot/dts/exynos3250.dtsi | 12 ++++++++++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index ecf79386e891..54c587f27265 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -158,6 +158,13 @@ samsung,pin-drv = <0>; }; + uart2_data: uart2-data { + samsung,pins = "gpa1-0", "gpa1-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + i2c3_bus: i2c3-bus { samsung,pins = "gpa1-2", "gpa1-3"; samsung,pin-function = <3>; diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 137f9015d4e8..030ce800f748 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -43,6 +43,7 @@ i2c7 = &i2c_7; serial0 = &serial_0; serial1 = &serial_1; + serial2 = &serial_2; }; cpus { @@ -452,6 +453,17 @@ status = "disabled"; }; + serial_2: serial@13820000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x13820000 0x100>; + interrupts = <0 111 0>; + clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>; + clock-names = "uart", "clk_uart_baud0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_data>; + status = "disabled"; + }; + i2c_0: i2c@13860000 { #address-cells = <1>; #size-cells = <0>;