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[80.11.198.90]) by smtp.gmail.com with ESMTPSA id m67sm7505239wma.3.2016.04.04.01.07.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 04 Apr 2016 01:07:21 -0700 (PDT) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, robin.murphy@arm.com, alex.williamson@redhat.com, will.deacon@arm.com, joro@8bytes.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, christoffer.dall@linaro.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Subject: [PATCH v6 4/7] dma-reserved-iommu: alloc/free_reserved_iova_domain Date: Mon, 4 Apr 2016 08:06:59 +0000 Message-Id: <1459757222-2668-5-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1459757222-2668-1-git-send-email-eric.auger@linaro.org> References: <1459757222-2668-1-git-send-email-eric.auger@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160404_010747_066147_C7F51103 X-CRM114-Status: GOOD ( 20.72 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: julien.grall@arm.com, patches@linaro.org, Jean-Philippe.Brucker@arm.com, Manish.Jaggi@caviumnetworks.com, p.fedin@samsung.com, linux-kernel@vger.kernel.org, Bharat.Bhushan@freescale.com, iommu@lists.linux-foundation.org, pranav.sawargaonkar@gmail.com, suravee.suthikulpanit@amd.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introduce alloc/free_reserved_iova_domain in the IOMMU API. alloc_reserved_iova_domain initializes an iova domain at a given iova base address and with a given size. This iova domain will be used to allocate iova within that window. Those IOVAs will be reserved for special purpose, typically MSI frame binding. Allocation function within the reserved iova domain will be introduced in subsequent patches. Those functions are implemented and exposed if CONFIG_IOMMU_DMA_RESERVED is seta. Signed-off-by: Eric Auger --- v5 -> v6: - use spin lock instead of mutex v3 -> v4: - formerly in "iommu/arm-smmu: implement alloc/free_reserved_iova_domain" & "iommu: add alloc/free_reserved_iova_domain" v2 -> v3: - remove iommu_alloc_reserved_iova_domain & iommu_free_reserved_iova_domain static implementation in case CONFIG_IOMMU_API is not set v1 -> v2: - moved from vfio API to IOMMU API --- drivers/iommu/Kconfig | 8 ++++ drivers/iommu/Makefile | 1 + drivers/iommu/dma-reserved-iommu.c | 75 ++++++++++++++++++++++++++++++++++++++ include/linux/dma-reserved-iommu.h | 45 +++++++++++++++++++++++ 4 files changed, 129 insertions(+) create mode 100644 drivers/iommu/dma-reserved-iommu.c create mode 100644 include/linux/dma-reserved-iommu.h diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index dd1dc39..a5a1530 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -74,6 +74,12 @@ config IOMMU_DMA select IOMMU_IOVA select NEED_SG_DMA_LENGTH +# IOMMU reserved IOVA mapping (MSI doorbell) +config IOMMU_DMA_RESERVED + bool + select IOMMU_API + select IOMMU_IOVA + config FSL_PAMU bool "Freescale IOMMU support" depends on PPC32 @@ -307,6 +313,7 @@ config SPAPR_TCE_IOMMU config ARM_SMMU bool "ARM Ltd. System MMU (SMMU) Support" depends on (ARM64 || ARM) && MMU + select IOMMU_DMA_RESERVED select IOMMU_API select IOMMU_IO_PGTABLE_LPAE select ARM_DMA_USE_IOMMU if ARM @@ -320,6 +327,7 @@ config ARM_SMMU config ARM_SMMU_V3 bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support" depends on ARM64 && PCI + select IOMMU_DMA_RESERVED select IOMMU_API select IOMMU_IO_PGTABLE_LPAE select GENERIC_MSI_IRQ_DOMAIN diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile index c6edb31..6c9ae99 100644 --- a/drivers/iommu/Makefile +++ b/drivers/iommu/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_IOMMU_API) += iommu.o obj-$(CONFIG_IOMMU_API) += iommu-traces.o obj-$(CONFIG_IOMMU_API) += iommu-sysfs.o obj-$(CONFIG_IOMMU_DMA) += dma-iommu.o +obj-$(CONFIG_IOMMU_DMA_RESERVED) += dma-reserved-iommu.o obj-$(CONFIG_IOMMU_IO_PGTABLE) += io-pgtable.o obj-$(CONFIG_IOMMU_IO_PGTABLE_ARMV7S) += io-pgtable-arm-v7s.o obj-$(CONFIG_IOMMU_IO_PGTABLE_LPAE) += io-pgtable-arm.o diff --git a/drivers/iommu/dma-reserved-iommu.c b/drivers/iommu/dma-reserved-iommu.c new file mode 100644 index 0000000..a461482 --- /dev/null +++ b/drivers/iommu/dma-reserved-iommu.c @@ -0,0 +1,75 @@ +/* + * Reserved IOVA Management + * + * Copyright (c) 2015 Linaro Ltd. + * www.linaro.org + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include + +int iommu_alloc_reserved_iova_domain(struct iommu_domain *domain, + dma_addr_t iova, size_t size, + unsigned long order) +{ + unsigned long granule, mask; + struct iova_domain *iovad; + unsigned long flags; + int ret = 0; + + granule = 1UL << order; + mask = granule - 1; + if (iova & mask || (!size) || (size & mask)) + return -EINVAL; + + iovad = kzalloc(sizeof(struct iova_domain), GFP_KERNEL); + if (!iovad) + return -ENOMEM; + + spin_lock_irqsave(&domain->reserved_lock, flags); + + if (domain->reserved_iova_cookie) { + ret = -EEXIST; + goto free_unlock; + } + + init_iova_domain(iovad, granule, + iova >> order, (iova + size - 1) >> order); + domain->reserved_iova_cookie = iovad; + goto unlock; + +free_unlock: + kfree(iovad); +unlock: + spin_unlock_irqrestore(&domain->reserved_lock, flags); + return ret; +} +EXPORT_SYMBOL_GPL(iommu_alloc_reserved_iova_domain); + +void iommu_free_reserved_iova_domain(struct iommu_domain *domain) +{ + struct iova_domain *iovad = + (struct iova_domain *)domain->reserved_iova_cookie; + unsigned long flags; + + if (!iovad) + return; + + spin_lock_irqsave(&domain->reserved_lock, flags); + + put_iova_domain(iovad); + kfree(iovad); + + spin_unlock_irqrestore(&domain->reserved_lock, flags); +} +EXPORT_SYMBOL_GPL(iommu_free_reserved_iova_domain); diff --git a/include/linux/dma-reserved-iommu.h b/include/linux/dma-reserved-iommu.h new file mode 100644 index 0000000..5bf863b --- /dev/null +++ b/include/linux/dma-reserved-iommu.h @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2015 Linaro Ltd. + * www.linaro.org + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ +#ifndef __DMA_RESERVED_IOMMU_H +#define __DMA_RESERVED_IOMMU_H + +#ifdef __KERNEL__ +#include + +#ifdef CONFIG_IOMMU_DMA_RESERVED +#include + +/** + * iommu_alloc_reserved_iova_domain: allocate the reserved iova domain + * + * @domain: iommu domain handle + * @iova: base iova address + * @size: iova window size + * @order: page order + */ +int iommu_alloc_reserved_iova_domain(struct iommu_domain *domain, + dma_addr_t iova, size_t size, + unsigned long order); + +/** + * iommu_free_reserved_iova_domain: free the reserved iova domain + * + * @domain: iommu domain handle + */ +void iommu_free_reserved_iova_domain(struct iommu_domain *domain); + +#endif /* CONFIG_IOMMU_DMA_RESERVED */ +#endif /* __KERNEL__ */ +#endif /* __DMA_RESERVED_IOMMU_H */