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Wed, 6 Apr 2016 11:00:39 +0000 Received: from lmh.ap.freescale.net (lmh.ap.freescale.net [10.193.20.68]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id u36B0Wqa002608; Wed, 6 Apr 2016 04:00:34 -0700 From: Minghuan Lian To: , , Subject: [PATCH] ARM: dts: ls1021a: add SCFG MSI dts node Date: Wed, 6 Apr 2016 19:02:07 +0800 Message-ID: <1459940527-26437-1-git-send-email-Minghuan.Lian@nxp.com> X-Mailer: git-send-email 1.9.1 X-EOPAttributedMessage: 0 X-Matching-Connectors: 131044140392318202; (91ab9b29-cfa4-454e-5278-08d120cd25b8); () X-Forefront-Antispam-Report: CIP:192.88.168.50; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(2980300002)(1110001)(1109001)(339900001)(189002)(199003)(586003)(5008740100001)(6806005)(11100500001)(1096002)(1220700001)(104016004)(19580405001)(85426001)(2201001)(48376002)(50466002)(87936001)(19580395003)(86362001)(2906002)(189998001)(81166005)(4326007)(575784001)(106466001)(50986999)(229853001)(50226001)(47776003)(105606002)(5003940100001)(5001770100001)(77096005)(92566002)(36756003)(7059030)(2101003)(217873001); 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Signed-off-by: Minghuan Lian Tested-by: Alexander Stein --- arch/arm/boot/dts/ls1021a.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 726372d..c0dee50 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -119,6 +119,20 @@ }; + msi1: msi-controller@1570e00 { + compatible = "fsl,1s1021a-msi"; + reg = <0x0 0x1570e00 0x0 0x8>; + msi-controller; + interrupts = ; + }; + + msi2: msi-controller@1570e08 { + compatible = "fsl,1s1021a-msi"; + reg = <0x0 0x1570e08 0x0 0x8>; + msi-controller; + interrupts = ; + }; + ifc: ifc@1530000 { compatible = "fsl,ifc", "simple-bus"; reg = <0x0 0x1530000 0x0 0x10000>; @@ -587,6 +601,7 @@ bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + msi-parent = <&msi1>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, @@ -609,6 +624,7 @@ bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + msi-parent = <&msi2>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,