From patchwork Sun Apr 10 19:30:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Jarzmik X-Patchwork-Id: 8792201 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 305ED9F39A for ; Sun, 10 Apr 2016 19:40:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 54ED820204 for ; Sun, 10 Apr 2016 19:40:41 +0000 (UTC) Received: from bombadil.infradead.org (unknown [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 43A11201ED for ; Sun, 10 Apr 2016 19:40:40 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1apL4U-0002rl-Ho; Sun, 10 Apr 2016 19:30:58 +0000 Received: from smtp03.smtpout.orange.fr ([80.12.242.125] helo=smtp.smtpout.orange.fr) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1apL4J-0002m5-Fe for linux-arm-kernel@lists.infradead.org; Sun, 10 Apr 2016 19:30:49 +0000 Received: from belgarion.home ([109.222.221.193]) by mwinf5d50 with ME id gjWJ1s0024Ay4BR03jWQs7; Sun, 10 Apr 2016 21:30:25 +0200 X-ME-Helo: belgarion.home X-ME-Date: Sun, 10 Apr 2016 21:30:25 +0200 X-ME-IP: 109.222.221.193 From: Robert Jarzmik To: Daniel Mack , Haojian Zhuang , Robert Jarzmik , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Subject: [PATCH 3/3] ARM: dts: add pxa25x .dtsi file Date: Sun, 10 Apr 2016 21:30:00 +0200 Message-Id: <1460316600-15978-3-git-send-email-robert.jarzmik@free.fr> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1460316600-15978-1-git-send-email-robert.jarzmik@free.fr> References: <1460316600-15978-1-git-send-email-robert.jarzmik@free.fr> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160410_123047_873880_A0295603 X-CRM114-Status: GOOD ( 16.65 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.4 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_MED,RDNS_NONE,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This file describes pxa25x SoCs. Not all devices are listed yet, only the subset which was already tested with a lubbock board. Signed-off-by: Robert Jarzmik --- arch/arm/boot/dts/pxa25x.dtsi | 92 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 arch/arm/boot/dts/pxa25x.dtsi diff --git a/arch/arm/boot/dts/pxa25x.dtsi b/arch/arm/boot/dts/pxa25x.dtsi new file mode 100644 index 000000000000..0d1e012178c4 --- /dev/null +++ b/arch/arm/boot/dts/pxa25x.dtsi @@ -0,0 +1,92 @@ +/* + * Copyright (C) 2016 Robert Jarzmik + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#include "pxa2xx.dtsi" +#include "dt-bindings/clock/pxa-clock.h" + +/ { + model = "Marvell PXA25x family SoC"; + compatible = "marvell,pxa250"; + + clocks { + /* + * The muxing of external clocks/internal dividers for osc* clock + * sources has been hidden under the carpet by now. + */ + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clks: pxa2xx_clks@41300004 { + compatible = "marvell,pxa250-core-clocks"; + #clock-cells = <1>; + status = "okay"; + }; + + /* timer oscillator */ + clktimer: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <3686400>; + clock-output-names = "ostimer"; + }; + }; + + pxabus { + pdma: dma-controller@40000000 { + compatible = "marvell,pdma-1.0"; + reg = <0x40000000 0x10000>; + interrupts = <25>; + #dma-channels = <16>; + #dma-cells = <2>; + #dma-requests = <40>; + status = "okay"; + }; + + pxairq: interrupt-controller@40d00000 { + marvell,intc-priority; + marvell,intc-nr-irqs = <32>; + }; + + pinctrl: pinctrl@40e00000 { + reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4 + 0x40f00020 0x10>; + compatible = "marvell,pxa25x-pinctrl"; + }; + + gpio: gpio@40e00000 { + compatible = "intel,pxa25x-gpio"; + gpio-ranges = <&pinctrl 0 0 84>; + clocks = <&clks CLK_NONE>; + }; + + pwm0: pwm@40b00000 { + compatible = "marvell,pxa250-pwm"; + reg = <0x40b00000 0x10>; + #pwm-cells = <1>; + clocks = <&clks CLK_PWM0>; + }; + + pwm1: pwm@40b00010 { + compatible = "marvell,pxa250-pwm"; + reg = <0x40b00010 0x10>; + #pwm-cells = <1>; + clocks = <&clks CLK_PWM1>; + }; + }; + + timer@40a00000 { + compatible = "marvell,pxa-timer"; + reg = <0x40a00000 0x20>; + interrupts = <26>; + clocks = <&clktimer>; + status = "okay"; + }; +};