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Mon, 11 Apr 2016 12:58:00 +0900 (KST) From: Chanwoo Choi To: myungjoo.ham@samsung.com, kyungmin.park@samsung.com, k.kozlowski@samsung.com, kgene@kernel.org, s.nawrocki@samsung.com, tomasz.figa@gmail.com Subject: [PATCH v9 11/20] ARM: dts: Add DMC bus node for Exynos3250 Date: Mon, 11 Apr 2016 12:57:49 +0900 Message-id: <1460347078-15175-12-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1460347078-15175-1-git-send-email-cw00.choi@samsung.com> References: <1460347078-15175-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrNIsWRmVeSWpSXmKPExsWyRsSkWPekAne4wc5N2hbXvzxntZh/5Byr Rf+bhawW516tZLSYdH8Ci8XrF4YW/Y9fM1ucbXrDbrHp8TVWi8u75rBZfO49wmgx4/w+Jot1 G2+xW9y+zGvx8sgPRoul1y8yWdxuXMFmMWH6WhaLM6cvsVq07j3CbnH4TTurRdvqD6wWq3b9 YXQQ91gzbw2jR0tzD5vH5b5eJo9bd+o9ds66y+6xcvkXNo9NqzrZPDYvqff4d4zdY8vVdhaP vi2rGD0+b5IL4InisklJzcksSy3St0vgyri++gJzwXfeinXvLjI2MP7m6mLk5JAQMJFoPvWK EcIWk7hwbz1bFyMXh5DACkaJNYc2ssIUtU14wgKRmMUosevIDUYI5wujROPVWWDtbAJaEvtf 3ABrFxGYyijx+VQbWAuzwBFmiakbbzCBVAkLOEvs3v2VDcRmEVCVeNq3CGwHr4CbxMdpB5gg 9slJfNjziB3E5gSKf1rfDlTDAbTOVeLZ5zqQmRICJzgkZl+/CzVHQOLb5EMsIDUSArISmw4w Q4yRlDi44gbLBEbhBYwMqxhFUwuSC4qT0otM9YoTc4tL89L1kvNzNzEC4/j0v2cTdzDeP2B9 iFGAg1GJh9fhGle4EGtiWXFl7iFGU6ANE5mlRJPzgckiryTe0NjMyMLUxNTYyNzSTEmcV0f6 Z7CQQHpiSWp2ampBalF8UWlOavEhRiYOTqkGxjWvnp/Ticy+JaCz6T2/ydL0yqO5jU9XcnlY LTF7MOHkqZnJrBOaZ9iY6Pzve/1P6tpcs9RrfZ2r762onzxFq+rIzgNlAt83+xg7KjLd+mV5 tHwD77kypqXxa4PmHtRtNOPvlD+8+nkx+6frrTaHtiz7tKcvZuUcBXYuPR2XbtbY9M0Wwm82 PlViKc5INNRiLipOBAD1S+Rf3gIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprBKsWRmVeSWpSXmKPExsVy+t9jQd2TCtzhBg+eqFhc//Kc1WL+kXOs Fv1vFrJanHu1ktFi0v0JLBavXxha9D9+zWxxtukNu8Wmx9dYLS7vmsNm8bn3CKPFjPP7mCzW bbzFbnH7Mq/FyyM/GC2WXr/IZHG7cQWbxYTpa1kszpy+xGrRuvcIu8XhN+2sFm2rP7BarNr1 h9FB3GPNvDWMHi3NPWwel/t6mTxu3an32DnrLrvHyuVf2Dw2repk89i8pN7j3zF2jy1X21k8 +rasYvT4vEkugCeqgdEmIzUxJbVIITUvOT8lMy/dVsk7ON453tTMwFDX0NLCXEkhLzE31VbJ xSdA1y0zB+hrJYWyxJxSoFBAYnGxkr4dpgmhIW66FjCNEbq+IUFwPUYGaCBhDWPG9dUXmAu+ 81ase3eRsYHxN1cXIyeHhICJRNuEJywQtpjEhXvr2boYuTiEBGYxSuw6coMRwvnCKNF4dRYj SBWbgJbE/hc3wKpEBKYySnw+1cYC4jALHGGWmLrxBhNIlbCAs8Tu3V/ZQGwWAVWJp32LWEFs XgE3iY/TDjBB7JOT+LDnETuIzQkU/7S+HaiGA2idq8Szz3UTGHkXMDKsYpRILUguKE5KzzXK Sy3XK07MLS7NS9dLzs/dxAhOFc+kdzAe3uV+iFGAg1GJh/fFZa5wIdbEsuLK3EOMEhzMSiK8 D2S5w4V4UxIrq1KL8uOLSnNSiw8xmgLdNZFZSjQ5H5jG8kriDY1NzIwsjcwNLYyMzZXEeR// XxcmJJCeWJKanZpakFoE08fEwSnVwLgl6c1P+UfZPerMQuoP1x+XncHKzH9txrnOpVaCBzqO nzvVbSizvzg7PdfDz+fonFBhPYe+Eo/K5kvd6+oXdT7kv9PVqPL7p8f3yL3Pdxve7Uo/XX3n gsG3/T2luZoy6ZtOMS17ee3Z30cmK0ODjk6692bXpygZ5+blLYtiHD9f6MrbO++mUY0SS3FG oqEWc1FxIgAqW/VCKwMAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160410_205831_334283_27B7A862 X-CRM114-Status: GOOD ( 10.48 ) X-Spam-Score: -7.9 (-------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, inki.dae@samsung.com, linux-samsung-soc@vger.kernel.org, linux@arm.linux.org.uk, cw00.choi@samsung.com, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, linux.amoon@gmail.com, linux-pm@vger.kernel.org, rjw@rjwysocki.net, linux-kernel@vger.kernel.org, m.reichl@fivetechno.de, tjakobi@math.uni-bielefeld.de, devicetree@vger.kernel.org, robh+dt@kernel.org, galak@codeaurora.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RDNS_NONE,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250 SoC. The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard SDRAM devices. The bus includes the OPP tables and the source clock for DMC block. Following list specifies the detailed relation between the clock and DMC block: - The source clock of DMC block : div_dmc Signed-off-by: Chanwoo Choi Reviewed-by: Krzysztof Kozlowski Acked-by: MyungJoo Ham --- arch/arm/boot/dts/exynos3250.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 137f9015d4e8..1ae72c4fa55e 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -688,6 +688,40 @@ clock-names = "ppmu"; status = "disabled"; }; + + bus_dmc: bus_dmc { + compatible = "samsung,exynos-bus"; + clocks = <&cmu_dmc CLK_DIV_DMC>; + clock-names = "bus"; + operating-points-v2 = <&bus_dmc_opp_table>; + status = "disabled"; + }; + + bus_dmc_opp_table: opp_table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp@50000000 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <800000>; + }; + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <800000>; + }; + opp@134000000 { + opp-hz = /bits/ 64 <134000000>; + opp-microvolt = <800000>; + }; + opp@200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <825000>; + }; + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <875000>; + }; + }; }; };