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Mon, 11 Apr 2016 16:40:52 +0900 (KST) From: Pankaj Dubey To: linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RESPIN v2 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding Date: Mon, 11 Apr 2016 13:12:23 +0530 Message-id: <1460360548-32127-2-git-send-email-pankaj.dubey@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1460360548-32127-1-git-send-email-pankaj.dubey@samsung.com> References: <1460360548-32127-1-git-send-email-pankaj.dubey@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpikeLIzCtJLcpLzFFi42I5/e+ZsS5rKHe4wdUzfBbnXq1ktHj9wtCi d8FVNov+x6+ZLTY9vsZqcXnXHDaLGef3MVksvX6RyeLU9c9sFq8urWKzWLT1C7tF694j7BYd yxgdeD3WzFvD6LFy+Rc2j02rOtk8Ni+p97hyoonVo2/LKkaPz5vkAtijuGxSUnMyy1KL9O0S uDL23vnDUvBSseJ7w0emBsY+qS5GTg4JAROJJZsns0LYYhIX7q1n62Lk4hASWMkocXb2fUaY onMnzjBCJGYxSnybuwqq6iejxOzZ/SwgVWwCuhJP3s9lBrFFBLIlJq99xAJSxCywmUni97MN bCAJYYFgiTuzT4E1sAioSpz/ewCsgVfAQ2LyyuMsEOvkJE4eg7iJU8BTonPLDTBbCKjmw6vF 7CBDJQSusUscmDCRDWKQgMS3yYeAmjmAErISmyBmSghIShxccYNlAqPwAkaGVYyiqQXJBcVJ 6UWmesWJucWleel6yfm5mxghUTNxB+P9A9aHGAU4GJV4eB2ucYULsSaWFVfmHmI0BdowkVlK NDkfGJt5JfGGxmZGFqYmpsZG5pZmSuK8OtI/g4UE0hNLUrNTUwtSi+KLSnNSiw8xMnFwSjUw Bh9hMT/0lktX/tL0Ladq/96/8n7H4fsSIq1sXvwCx9RMF3D+dotdI6DY+fHfV11mR8Ut51qT /h35YfNv+rka7kg5vg2N0+zvFP3sqv3T0fvFaNPe6d5Pc/lfvH3Ow1gVoepXPHWneJPt6ugn 7b3yjVO8jy9g12W2SajLjeDU3s01Tedk43oRJZbijERDLeai4kQAaxUMspUCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrPIsWRmVeSWpSXmKPExsVy+t9jQV3WUO5wg1v9nBbnXq1ktHj9wtCi d8FVNov+x6+ZLTY9vsZqcXnXHDaLGef3MVksvX6RyeLU9c9sFq8urWKzWLT1C7tF694j7BYd yxgdeD3WzFvD6LFy+Rc2j02rOtk8Ni+p97hyoonVo2/LKkaPz5vkAtijGhhtMlITU1KLFFLz kvNTMvPSbZW8g+Od403NDAx1DS0tzJUU8hJzU22VXHwCdN0yc4COVVIoS8wpBQoFJBYXK+nb YZoQGuKmawHTGKHrGxIE12NkgAYS1jFm7L3zh6XgpWLF94aPTA2MfVJdjJwcEgImEudOnGGE sMUkLtxbz9bFyMUhJDCLUeLb3FVQzk9Gidmz+1lAqtgEdCWevJ/LDGKLCGRLTF77iAWkiFlg M5PE72cb2EASwgLBEndmnwJrYBFQlTj/9wBYA6+Ah8TklcdZINbJSZw8NpkVxOYU8JTo3HID zBYCqvnwajH7BEbeBYwMqxglUguSC4qT0nMN81LL9YoTc4tL89L1kvNzNzGCI/OZ1A7Gg7vc DzEKcDAq8fC+uMwVLsSaWFZcmXuIUYKDWUmEd0Ygd7gQb0piZVVqUX58UWlOavEhRlOgwyYy S4km5wOTRl5JvKGxiZmRpZGZhZGJubmSOO/j/+vChATSE0tSs1NTC1KLYPqYODilGhj1ul9H sB2YNW/25qxim2WPDrWLH74pcHhqK7eUZXrDvKnzVetstq5N3cVdEfTyuI107Fyrr9pmVt/K a3P2i2wzD8q8u375+U2C7qHKk9ILV3ofuJBx2nj3V84T13xEuZy+RizmWbdT8jq3et1xAe8/ y262plRMeV6dbnho+ZxGgbi7UfMbrAqUWIozEg21mIuKEwFv7wfJ4gIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160411_004115_807262_F1510AE2 X-CRM114-Status: GOOD ( 18.14 ) X-Spam-Score: -7.9 (-------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , k.kozlowski@samsung.com, kgene.kim@samsung.com, Ian Campbell , Pankaj Dubey , p.fedin@samsung.com, Rob Herring , thomas.ab@samsung.com, Kukjin Kim , olof@lixom.net MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RDNS_NONE,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds exynos-srom binding information for SROM Controller driver on Exynos SoCs. Documentation for new subnode properties, allowing bank configuration are added based on u-boot implementation, but heavily reworked. CC: Rob Herring CC: Mark Rutland CC: Ian Campbell Signed-off-by: Pankaj Dubey [p.fedin: Added SROMc configuration description and fixed SROMc mapping] Signed-off-by: Pavel Fedin Reviewed-by: Krzysztof Kozlowski Signed-off-by: Kukjin Kim Signed-off-by: Krzysztof Kozlowski --- .../bindings/memory-controllers/exynos-srom.txt | 79 ++++++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt new file mode 100644 index 0000000..f633b5d --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt @@ -0,0 +1,79 @@ +SAMSUNG Exynos SoCs SROM Controller driver. + +Required properties: +- compatible : Should contain "samsung,exynos4210-srom". + +- reg: offset and length of the register set + +Optional properties: +The SROM controller can be used to attach external peripherals. In this case +extra properties, describing the bus behind it, should be specified as below: + +- #address-cells: Must be set to 2 to allow device address translation. + Address is specified as (bank#, offset). + +- #size-cells: Must be set to 1 to allow device size passing + +- ranges: Must be set up to reflect the memory layout with four integer values + per bank: + 0 + +Sub-nodes: +The actual device nodes should be added as subnodes to the SROMc node. These +subnodes, in addition to regular device specification, should contain the following +properties, describing configuration of the relevant SROM bank: + +Required properties: +- reg: bank number, base address (relative to start of the bank) and size of + the memory mapped for the device. Note that base address will be + typically 0 as this is the start of the bank. + +- samsung,srom-timing : array of 6 integers, specifying bank timings in the + following order: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs. + Each value is specified in cycles and has the following + meaning and valid range: + Tacp : Page mode access cycle at Page mode (0 - 15) + Tcah : Address holding time after CSn (0 - 15) + Tcoh : Chip selection hold on OEn (0 - 15) + Tacc : Access cycle (0 - 31, the actual time is N + 1) + Tcos : Chip selection set-up before OEn (0 - 15) + Tacs : Address set-up before CSn (0 - 15) + +Optional properties: +- reg-io-width : data width in bytes (1 or 2). If omitted, default of 1 is used. + +- samsung,srom-page-mode : if page mode is set, 4 data page mode will be configured, + else normal (1 data) page mode will be set. + +Example: basic definition, no banks are configured + memory-controller@12570000 { + compatible = "samsung,exynos4210-srom"; + reg = <0x12570000 0x14>; + }; + +Example: SROMc with SMSC911x ethernet chip on bank 3 + memory-controller@12570000 { + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x04000000 0x20000 // Bank0 + 1 0 0x05000000 0x20000 // Bank1 + 2 0 0x06000000 0x20000 // Bank2 + 3 0 0x07000000 0x20000>; // Bank3 + + compatible = "samsung,exynos4210-srom"; + reg = <0x12570000 0x14>; + + ethernet@3,0 { + compatible = "smsc,lan9115"; + reg = <3 0 0x10000>; // Bank 3, offset = 0 + phy-mode = "mii"; + interrupt-parent = <&gpx0>; + interrupts = <5 8>; + reg-io-width = <2>; + smsc,irq-push-pull; + smsc,force-internal-phy; + + samsung,srom-page-mode; + samsung,srom-timing = <9 12 1 9 1 1>; + }; + };