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[216.31.211.11]) by smtp.gmail.com with ESMTPSA id u65sm856767pfa.9.2016.05.02.18.26.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 02 May 2016 18:26:21 -0700 (PDT) From: Florian Fainelli To: linux-pci@vger.kernel.org Subject: [PATCH 1/2] Documentation: DT: bindings: Add Broadcom STB PCIe bindings Date: Mon, 2 May 2016 18:25:48 -0700 Message-Id: <1462238749-19715-2-git-send-email-f.fainelli@gmail.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1462238749-19715-1-git-send-email-f.fainelli@gmail.com> References: <1462238749-19715-1-git-send-email-f.fainelli@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160502_182643_361175_18884239 X-CRM114-Status: GOOD ( 18.01 ) X-Spam-Score: -2.7 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Florian Fainelli , linux-kernel@vger.kernel.org, jim2101024@gmail.com, bcm-kernel-feedback-list@broadcom.com, bhelgaas@google.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jim Quinlan This patchs adds the Device Tree bindings for the Broadcom STB PCIe root complex hardware. Signed-off-by: Jim Quinlan Signed-off-by: Florian Fainelli --- .../devicetree/bindings/pci/brcm,brcmstb-pcie.txt | 81 ++++++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/brcm,brcmstb-pcie.txt diff --git a/Documentation/devicetree/bindings/pci/brcm,brcmstb-pcie.txt b/Documentation/devicetree/bindings/pci/brcm,brcmstb-pcie.txt new file mode 100644 index 000000000000..922317969ab5 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/brcm,brcmstb-pcie.txt @@ -0,0 +1,81 @@ +Brcmstb PCIe Host Controller Device Tree Bindings + +Introduction: + +The brcmstb host controller closely follows the example set in + + [1] http://devicetree.org/Device_Tree_Usage#PCI_Host_Bridge + +The rest of this document explains some added customizations and +offers an example Brcmstb PCIe host controller DT node. + +Required Properties: + reg -- the register start address and length for the PCIe block. + Additional start,length pairs may be specified for clock addresses. + interrupts -- this must be specified but it is used indirectly. Interrupt + zero must be specified; the Brcmstb driver code uses this interrupt + to determine the offset used for all interrupts, specifically, those + listed in interrupt-map. + compatible -- must be one of: "brcm,bcm7425-pcie", "brcm,bcm7435-pcie" or + "brcm,bcm7445-pcie". + #address-cells -- the number of address cells for PCI-space. + #size-cells -- the number of size cells for PCI-space. + ranges -- See [1]; a specification of the outbound windows for the host + controller. Each outbound window is described by a 7-tuple: + (3 entries) -- PCIe space start address (0th entry is ignored). + (2 entries) -- CPU/System start address + (2 entries) -- Size of region. + Due to hardware limitations, there may be a maximum of four windows + specified. + #interrupt-cells -- number of cells used to describe the interrupt. + interrupt-map -- See [1]; each interrupt requires 7 entries, and + currently all but the fifth entry (order 0) -- the interrupt + number -- is ignored. There must be four interrupts specified + for the PCI's INTA, INTB, INTC, and INTD. + +Optional Properties: + interrupt-names -- names of the interrupts listed in the interrupt map. + clocks -- list of clock phandles. If specified, this should list one + clock. + clock-names -- the "local" names of the clocks specified in 'clocks'. Note + that if the 'clocks' property is given, 'clock-names' is mandatory, + and the name of the clock is expected to be "sw_pcie". + brcm,ssc -- (boolean) indicates usage of spread-spectrum clocking. + brcm,gen -- (integer) indicates desired generation of link: + 1 => 2.5 Gbps, 2 => 5.0 Gbps, 3 => 8.0 Gbps. + supply-names -- the names of voltage regulators that the root + complex should turn off/on/on on suspend/resume/boot. This + is a string list. + supplies -- A collection of phandles to a regulator nodes, see + Documentation/devicetree/bindings/regulator/ for specific + bindings. The number and order of phandles must match + exactly the number of strings in the "supply-names" property. + +Example Node: + + pcie@f0460000 { + reg = <0x0 0xf0460000 0x0 0x9310>; + interrupts = <0x0 0x0 0x4>; + compatible = "brcm,pci-plat-dev"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x02000000 0x00000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x08000000 + 0x02000000 0x00000000 0x08000000 0x00000000 0xc8000000 0x00000000 0x08000000>; + #interrupt-cells = <1>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0 0 0 1 &intc 47 3 + 0 0 0 2 &intc 48 3 + 0 0 0 3 &intc 49 3 + 0 0 0 4 &intc 50 3>; + interrupt-names = "pcie_0_inta", + "pcie_0_intb", + "pcie_0_intc", + "pcie_0_intd"; + clocks = <&sw_pcie0>; + clock-names = "sw_pcie"; + brcm,ssc; + brcm,gen = <1>; + supply-names = "vreg-wifi-pwr"; + supplies = <&vreg-wifi-pwr>; + + };