Message ID | 1462417950-46796-2-git-send-email-yangbo.lu@nxp.com (mailing list archive) |
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State | New, archived |
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client-ip=192.88.158.2; helo=az84smr01.freescale.net; Received: from az84smr01.freescale.net (192.88.158.2) by BN1AFFO11FD025.mail.protection.outlook.com (10.58.52.85) with Microsoft SMTP Server (TLS) id 15.1.485.4 via Frontend Transport; Thu, 5 May 2016 03:22:24 +0000 Received: from titan.ap.freescale.net ([10.192.208.233]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id u453M4sG004368; Wed, 4 May 2016 20:22:16 -0700 From: Yangbo Lu <yangbo.lu@nxp.com> To: <linux-mmc@vger.kernel.org>, <linuxppc-dev@lists.ozlabs.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-i2c@vger.kernel.org>, <iommu@lists.linux-foundation.org>, <netdev@vger.kernel.org> Subject: [v10, 1/7] Documentation: DT: update Freescale DCFG compatible Date: Thu, 5 May 2016 11:12:24 +0800 Message-ID: <1462417950-46796-2-git-send-email-yangbo.lu@nxp.com> X-Mailer: git-send-email 2.1.0.27.g96db324 In-Reply-To: <1462417950-46796-1-git-send-email-yangbo.lu@nxp.com> References: <1462417950-46796-1-git-send-email-yangbo.lu@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131068921451842318; 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On Thu, May 05, 2016 at 11:12:24AM +0800, Yangbo Lu wrote: > Update Freescale DCFG compatible with 'fsl,<chip>-dcfg' instead > of 'fsl,ls1021a-dcfg' to include more chips such as ls1021a, > ls1043a, and ls2080a. > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> > --- > Changes for v8: > - Added this patch > Changes for v9: > - Added a list for the possible compatibles > Changes for v10: > - None > --- > Documentation/devicetree/bindings/arm/fsl.txt | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt index 752a685..465cba1 100644 --- a/Documentation/devicetree/bindings/arm/fsl.txt +++ b/Documentation/devicetree/bindings/arm/fsl.txt @@ -119,7 +119,11 @@ Freescale DCFG configuration and status for the device. Such as setting the secondary core start address and release the secondary core from holdoff and startup. Required properties: - - compatible: should be "fsl,ls1021a-dcfg" + - compatible: should be "fsl,<chip>-dcfg" + Possible compatibles: + "fsl,ls1021a-dcfg" + "fsl,ls1043a-dcfg" + "fsl,ls2080a-dcfg" - reg : should contain base address and length of DCFG memory-mapped registers Example:
Update Freescale DCFG compatible with 'fsl,<chip>-dcfg' instead of 'fsl,ls1021a-dcfg' to include more chips such as ls1021a, ls1043a, and ls2080a. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> --- Changes for v8: - Added this patch Changes for v9: - Added a list for the possible compatibles Changes for v10: - None --- Documentation/devicetree/bindings/arm/fsl.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)