| Message ID | 1462490972-13566-2-git-send-email-jonmason@broadcom.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index a44bf29..1759e65 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -57,7 +57,7 @@ compatible = "arm,cortex-a9"; next-level-cache = <&L2>; enable-method = "brcm,bcm-nsp-smp"; - secondary-boot-reg = <0xffff042c>; + secondary-boot-reg = <0xffff0fec>; reg = <0x1>; }; };
NSP B0 has a different address for the second core. Since there should not be any Ax versions in the field, it should be safe to universally change this. Signed-off-by: Jon Mason <jonmason@broadcom.com> --- arch/arm/boot/dts/bcm-nsp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)