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[98.203.232.209]) by smtp.gmail.com with ESMTPSA id p1sm21654041paz.8.2016.05.06.07.21.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 06 May 2016 07:21:31 -0700 (PDT) From: Kevin Hilman To: linux-amlogic@lists.infradead.org, Carlo Caione , Linus Walleij Subject: [PATCH 5/7] ARM64: dts: amlogic: add pins for EMMC, SD Date: Fri, 6 May 2016 07:21:24 -0700 Message-Id: <1462544486-9516-6-git-send-email-khilman@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1462544486-9516-1-git-send-email-khilman@baylibre.com> References: <1462544486-9516-1-git-send-email-khilman@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160506_072151_244279_DAAF5827 X-CRM114-Status: UNSURE ( 9.70 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Xing Wu , Victor Wan , linux-meson@googlegroups.com, linux-gpio@vger.kernel.org, Jerry Cao , =?UTF-8?q?Andreas=20F=C3=A4rber?= , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-6.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Kevin Hilman --- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 35397fcc5380..7b22b9d3b9d9 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -213,6 +213,27 @@ gpio-controller; #gpio-cells = <2>; }; + + emmc_pins: emmc { + mux { + groups = "emmc_nand_d07", + "emmc_cmd", + "emmc_clk"; + function = "emmc"; + }; + }; + + sdcard_pins: sdcard { + mux { + groups = "sdcard_d0", + "sdcard_d1", + "sdcard_d2", + "sdcard_d3", + "sdcard_cmd", + "sdcard_clk"; + function = "sdcard"; + }; + }; }; };