From patchwork Sun May 8 19:05:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 9039371 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 72884BF440 for ; Sun, 8 May 2016 19:08:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id ABE7020122 for ; Sun, 8 May 2016 19:08:47 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D7ED620138 for ; Sun, 8 May 2016 19:08:46 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1azU2j-0004yQ-58; Sun, 08 May 2016 19:07:05 +0000 Received: from mail.kernel.org ([198.145.29.136]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1azU2V-0004sJ-HC for linux-arm-kernel@lists.infradead.org; Sun, 08 May 2016 19:06:51 +0000 Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 928B620138; Sun, 8 May 2016 19:06:32 +0000 (UTC) Received: from localhost.localdomain (89-66-181-234.dynamic.chello.pl [89.66.181.234]) (using TLSv1.2 with cipher AES128-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2B4682013D; Sun, 8 May 2016 19:06:28 +0000 (UTC) From: Krzysztof Kozlowski To: Kukjin Kim , Krzysztof Kozlowski , Sylwester Nawrocki , Tomasz Figa , Michael Turquette , Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v2 02/22] dt-bindings: clock: Add PWM and USB clock IDs to Exynos5410 Date: Sun, 8 May 2016 21:05:47 +0200 Message-Id: <1462734367-5619-3-git-send-email-krzk@kernel.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1462734367-5619-1-git-send-email-krzk@kernel.org> References: <1462734367-5619-1-git-send-email-krzk@kernel.org> X-Spam-Status: No, score=-6.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160508_120651_616323_F5964F38 X-CRM114-Status: GOOD ( 14.20 ) X-Spam-Score: -6.3 (------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Javier Martinez Canillas , Krzysztof Kozlowski MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add IDs for PWM and USB clocks to Exynos5410. Use the same number as for Exynos5420 just in case in future these drivers were merged. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas --- include/dt-bindings/clock/exynos5410.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/include/dt-bindings/clock/exynos5410.h b/include/dt-bindings/clock/exynos5410.h index 213f19e02870..34c8e96987a1 100644 --- a/include/dt-bindings/clock/exynos5410.h +++ b/include/dt-bindings/clock/exynos5410.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * Copyright (c) 2016 Krzysztof Kozlowski * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -27,16 +28,25 @@ #define CLK_SCLK_MMC0 132 #define CLK_SCLK_MMC1 133 #define CLK_SCLK_MMC2 134 +#define CLK_SCLK_USBD300 150 +#define CLK_SCLK_USBD301 151 +#define CLK_SCLK_USBPHY300 152 +#define CLK_SCLK_USBPHY301 153 +#define CLK_SCLK_PWM 155 /* gate clocks */ #define CLK_UART0 257 #define CLK_UART1 258 #define CLK_UART2 259 #define CLK_UART3 260 +#define CLK_PWM 279 #define CLK_MCT 315 #define CLK_MMC0 351 #define CLK_MMC1 352 #define CLK_MMC2 353 +#define CLK_USBH20 365 +#define CLK_USBD300 366 +#define CLK_USBD301 367 #define CLK_NR_CLKS 512