| Message ID | 1463056732-5607-2-git-send-email-kernel@martin.sperl.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, May 12, 2016 at 12:38:49PM +0000, kernel@martin.sperl.org wrote: > From: Martin Sperl <kernel@martin.sperl.org> > > Add memory controller dt-binding documentation for the > bcm2835 soc. > > Signed-off-by: Martin Sperl <kernel@martin.sperl.org> > --- > .../bindings/memory-controllers/brcm,bcm2835-sdram.txt | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > create mode 100644 Documentation/devicetree/bindings/memory-controllers/brcm,bcm2835-sdram.txt I'd suspect a DDR controller has more than one clock, but otherwise looks fine. And this binding is pretty much independent of the discussion for this series. Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/memory-controllers/brcm,bcm2835-sdram.txt b/Documentation/devicetree/bindings/memory-controllers/brcm,bcm2835-sdram.txt new file mode 100644 index 0000000..d1cb151 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/brcm,bcm2835-sdram.txt @@ -0,0 +1,16 @@ +Binding for SDRAM driver for BCM2835 SoCs. + +Required parameters: +------------------- + +compatible : should be: "brcm,bcm2835-sdram" +reg : Address ranges of the ic1/ic2 registers. +clocks : Phandle of the clock used by the sdram. + +Example: + +memory-conroller@7e002000 { + compatible = "brcm,bcm2835-sdram"; + reg = <0x7e002000 0x58>, <0x7e002800 0x58>; + clocks = <&clocks BCM2835_CLOCK_SDRAM>; +};