From patchwork Tue Jun 7 22:44:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 9162765 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0728960467 for ; Tue, 7 Jun 2016 22:48:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ECFB628360 for ; Tue, 7 Jun 2016 22:48:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E18F32836E; Tue, 7 Jun 2016 22:48:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 76FF528360 for ; Tue, 7 Jun 2016 22:48:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1bAPlm-0006ft-7V; Tue, 07 Jun 2016 22:46:46 +0000 Received: from mail-pf0-x229.google.com ([2607:f8b0:400e:c00::229]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1bAPke-0005Ru-F7 for linux-arm-kernel@lists.infradead.org; Tue, 07 Jun 2016 22:45:39 +0000 Received: by mail-pf0-x229.google.com with SMTP id t190so8176465pfb.3 for ; Tue, 07 Jun 2016 15:45:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=HfTOsqgh8K4SEOetO/426fupm56oR2de0bwA6m39Cvk=; b=VXVyXXUp17z+ZzI0MYbi7MN0ma9Vs8xYCfQhBP/o6nfj5TP09uYx9ZSrO9lCR5/aNU RtPlWP+8Qj9HhsNKOTEr14ENiYM7uyTMiI1EKRbPKtbWKEVgIF4AwlvRLbNhE2+s2Isx dmwENaeR2HdNxYRGcZyfNh4peq6KEU9SXTyOo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HfTOsqgh8K4SEOetO/426fupm56oR2de0bwA6m39Cvk=; b=aknasHc3BnZ+i1fDS8WzERFeSxyOO6tR51PPCq8ugBPdliGBOldmvlHJ7g6Z4VLeU2 zeEJIt9Ihhe+Cw+inO88Eat5lTiDx4wZnN8MqCIdsfV5PTLzhlLcvYY53HY5aU9UAMsB R6bwl/5cT/ztyJNbm0PHM25U+I87g6KZF4f/FJUJZ8bT9Ah9PMgj98UcBk66DiIVvoKT 9l2nHErjAP/7CvTx6uJlHCS7kp1SmVjBz5ETMyvYQfImPVMi1g/YGU03auJDBVK6wR3O KqY6Y4/TYICqkFQ6WYD0OYT4V2QnPCiTwAXOVS5Xp7poWNiuhZy5WDcfhIiU0TstjHRc mCAQ== X-Gm-Message-State: ALyK8tIpRcsQGgJj3+qfDPIZ8keZeLcetHF5zZiGdrMBZYRUs7eQo78rzN9IwNowhIVIXJNy X-Received: by 10.98.6.69 with SMTP id 66mr1889213pfg.115.1465339516304; Tue, 07 Jun 2016 15:45:16 -0700 (PDT) Received: from tictac.mtv.corp.google.com ([172.22.65.76]) by smtp.gmail.com with ESMTPSA id 4sm37641782pfm.15.2016.06.07.15.45.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 07 Jun 2016 15:45:16 -0700 (PDT) From: Douglas Anderson To: ulf.hansson@linaro.org, kishon@ti.com, Heiko Stuebner , robh+dt@kernel.org Subject: [PATCH 08/11] Documentation: phy: Let the rockchip eMMC PHY get an exported card clock Date: Tue, 7 Jun 2016 15:44:41 -0700 Message-Id: <1465339484-969-9-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 In-Reply-To: <1465339484-969-1-git-send-email-dianders@chromium.org> References: <1465339484-969-1-git-send-email-dianders@chromium.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160607_154536_806671_932A3A9B X-CRM114-Status: GOOD ( 12.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, xzy.xu@rock-chips.com, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, linux-kernel@vger.kernel.org, shawn.lin@rock-chips.com, briannorris@chromium.org, linux-mmc@vger.kernel.org, adrian.hunter@intel.com, Douglas Anderson , linux-rockchip@lists.infradead.org, galak@codeaurora.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP As of an earlier change in this series ("Documentation: mmc: sdhci-of-arasan: Add ability to export card clock") the SDHCI driver used on Rockchip SoCs can now expose its clock. Let's now specify that the PHY can use it. Letting the PHY get access to this clock means it can adjust phyctrl_frqsel field appropriately. Although the Rockchip PHY appears slightly different than the reference Arasan one, you can see that the Arasan datasheet [1] had it defined as: Select the frequency range of DLL operation: 3b'000 => 200MHz to 170 MHz 3b'001 => 170MHz to 140 MHz 3b'010 => 140MHz to 110 MHz 3b'011 => 110MHz to 80MHz 3b'100 => 80MHz to 50 MHz 3b'101 => 275Mhz to 250MHz 3b'110 => 250MHz to 225MHz 3b'111 => 225MHz to 200MHz On the Rockchip version of the PHY we have less granularity but the idea is the same. [1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf Signed-off-by: Douglas Anderson --- Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt index 555cb0f40690..fd118b071e5e 100644 --- a/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt +++ b/Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt @@ -7,6 +7,11 @@ Required properties: - reg: PHY register address offset and length in "general register files" +Optional clocks (see ../clock/clock-bindings.txt), specified by name: + - emmcclk: The card clock exported by the SDHCI driver. Although this is + listed as optional (because most boards can get basic functionality + without having access to it), it is strongly suggested. + Example: @@ -20,6 +25,8 @@ grf: syscon@ff770000 { emmcphy: phy@f780 { compatible = "rockchip,rk3399-emmc-phy"; reg = <0xf780 0x20>; + clocks = <&sdhci>; + clock-names = "emmcclk"; #phy-cells = <0>; }; };