From patchwork Mon Jun 13 19:04:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 9174089 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 70D3960573 for ; Mon, 13 Jun 2016 19:09:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 61DEE1FF21 for ; Mon, 13 Jun 2016 19:09:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 55B9222230; Mon, 13 Jun 2016 19:09:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.2 required=2.0 tests=BAYES_00,FSL_HELO_HOME, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DFB7A1FF21 for ; Mon, 13 Jun 2016 19:09:37 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1bCXDG-0002P3-JM; Mon, 13 Jun 2016 19:07:54 +0000 Received: from bear.ext.ti.com ([198.47.19.11]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1bCXBX-0000Ik-Jq for linux-arm-kernel@lists.infradead.org; Mon, 13 Jun 2016 19:06:10 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id u5DJ5nos003514; Mon, 13 Jun 2016 14:05:49 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id u5DJ5nBW017391; Mon, 13 Jun 2016 14:05:49 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Mon, 13 Jun 2016 14:05:48 -0500 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u5DJ56T1004255; Mon, 13 Jun 2016 14:05:46 -0500 From: Tero Kristo To: , , , , Subject: [RESEND PATCHv2 13/28] clk: ti: am43xx: transition to usage of ti_clk_get Date: Mon, 13 Jun 2016 22:04:47 +0300 Message-ID: <1465844702-12200-14-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1465844702-12200-1-git-send-email-t-kristo@ti.com> References: <1465844702-12200-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160613_120607_980465_549F0A4C X-CRM114-Status: UNSURE ( 8.76 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Cleanup any unnecessary DT_CLK() alias entries from the AM43xx clock file. Also, use ti_clk_get where necessary. Signed-off-by: Tero Kristo --- drivers/clk/ti/clk-43xx.c | 88 ++--------------------------------------------- 1 file changed, 2 insertions(+), 86 deletions(-) diff --git a/drivers/clk/ti/clk-43xx.c b/drivers/clk/ti/clk-43xx.c index 097fc90..eefa62b 100644 --- a/drivers/clk/ti/clk-43xx.c +++ b/drivers/clk/ti/clk-43xx.c @@ -23,92 +23,8 @@ #include "clock.h" static struct ti_dt_clk am43xx_clks[] = { - DT_CLK(NULL, "clk_32768_ck", "clk_32768_ck"), - DT_CLK(NULL, "clk_rc32k_ck", "clk_rc32k_ck"), - DT_CLK(NULL, "virt_19200000_ck", "virt_19200000_ck"), - DT_CLK(NULL, "virt_24000000_ck", "virt_24000000_ck"), - DT_CLK(NULL, "virt_25000000_ck", "virt_25000000_ck"), - DT_CLK(NULL, "virt_26000000_ck", "virt_26000000_ck"), - DT_CLK(NULL, "sys_clkin_ck", "sys_clkin_ck"), - DT_CLK(NULL, "tclkin_ck", "tclkin_ck"), - DT_CLK(NULL, "dpll_core_ck", "dpll_core_ck"), - DT_CLK(NULL, "dpll_core_x2_ck", "dpll_core_x2_ck"), - DT_CLK(NULL, "dpll_core_m4_ck", "dpll_core_m4_ck"), - DT_CLK(NULL, "dpll_core_m5_ck", "dpll_core_m5_ck"), - DT_CLK(NULL, "dpll_core_m6_ck", "dpll_core_m6_ck"), - DT_CLK(NULL, "dpll_mpu_ck", "dpll_mpu_ck"), - DT_CLK(NULL, "dpll_mpu_m2_ck", "dpll_mpu_m2_ck"), - DT_CLK(NULL, "dpll_ddr_ck", "dpll_ddr_ck"), - DT_CLK(NULL, "dpll_ddr_m2_ck", "dpll_ddr_m2_ck"), - DT_CLK(NULL, "dpll_disp_ck", "dpll_disp_ck"), - DT_CLK(NULL, "dpll_disp_m2_ck", "dpll_disp_m2_ck"), - DT_CLK(NULL, "dpll_per_ck", "dpll_per_ck"), - DT_CLK(NULL, "dpll_per_m2_ck", "dpll_per_m2_ck"), - DT_CLK(NULL, "dpll_per_m2_div4_wkupdm_ck", "dpll_per_m2_div4_wkupdm_ck"), - DT_CLK(NULL, "dpll_per_m2_div4_ck", "dpll_per_m2_div4_ck"), - DT_CLK(NULL, "adc_tsc_fck", "adc_tsc_fck"), - DT_CLK(NULL, "clkdiv32k_ck", "clkdiv32k_ck"), - DT_CLK(NULL, "clkdiv32k_ick", "clkdiv32k_ick"), - DT_CLK(NULL, "dcan0_fck", "dcan0_fck"), - DT_CLK(NULL, "dcan1_fck", "dcan1_fck"), - DT_CLK(NULL, "pruss_ocp_gclk", "pruss_ocp_gclk"), - DT_CLK(NULL, "mcasp0_fck", "mcasp0_fck"), - DT_CLK(NULL, "mcasp1_fck", "mcasp1_fck"), - DT_CLK(NULL, "smartreflex0_fck", "smartreflex0_fck"), - DT_CLK(NULL, "smartreflex1_fck", "smartreflex1_fck"), - DT_CLK(NULL, "sha0_fck", "sha0_fck"), - DT_CLK(NULL, "aes0_fck", "aes0_fck"), - DT_CLK(NULL, "timer1_fck", "timer1_fck"), - DT_CLK(NULL, "timer2_fck", "timer2_fck"), - DT_CLK(NULL, "timer3_fck", "timer3_fck"), - DT_CLK(NULL, "timer4_fck", "timer4_fck"), - DT_CLK(NULL, "timer5_fck", "timer5_fck"), - DT_CLK(NULL, "timer6_fck", "timer6_fck"), - DT_CLK(NULL, "timer7_fck", "timer7_fck"), - DT_CLK(NULL, "wdt1_fck", "wdt1_fck"), - DT_CLK(NULL, "l3_gclk", "l3_gclk"), - DT_CLK(NULL, "dpll_core_m4_div2_ck", "dpll_core_m4_div2_ck"), - DT_CLK(NULL, "l4hs_gclk", "l4hs_gclk"), - DT_CLK(NULL, "l3s_gclk", "l3s_gclk"), - DT_CLK(NULL, "l4ls_gclk", "l4ls_gclk"), - DT_CLK(NULL, "clk_24mhz", "clk_24mhz"), - DT_CLK(NULL, "cpsw_125mhz_gclk", "cpsw_125mhz_gclk"), - DT_CLK(NULL, "cpsw_cpts_rft_clk", "cpsw_cpts_rft_clk"), - DT_CLK(NULL, "dpll_clksel_mac_clk", "dpll_clksel_mac_clk"), - DT_CLK(NULL, "gpio0_dbclk_mux_ck", "gpio0_dbclk_mux_ck"), - DT_CLK(NULL, "gpio0_dbclk", "gpio0_dbclk"), - DT_CLK(NULL, "gpio1_dbclk", "gpio1_dbclk"), - DT_CLK(NULL, "gpio2_dbclk", "gpio2_dbclk"), - DT_CLK(NULL, "gpio3_dbclk", "gpio3_dbclk"), - DT_CLK(NULL, "gpio4_dbclk", "gpio4_dbclk"), - DT_CLK(NULL, "gpio5_dbclk", "gpio5_dbclk"), - DT_CLK(NULL, "mmc_clk", "mmc_clk"), - DT_CLK(NULL, "gfx_fclk_clksel_ck", "gfx_fclk_clksel_ck"), - DT_CLK(NULL, "gfx_fck_div_ck", "gfx_fck_div_ck"), DT_CLK(NULL, "timer_32k_ck", "clkdiv32k_ick"), DT_CLK(NULL, "timer_sys_ck", "sys_clkin_ck"), - DT_CLK(NULL, "sysclk_div", "sysclk_div"), - DT_CLK(NULL, "disp_clk", "disp_clk"), - DT_CLK(NULL, "clk_32k_mosc_ck", "clk_32k_mosc_ck"), - DT_CLK(NULL, "clk_32k_tpm_ck", "clk_32k_tpm_ck"), - DT_CLK(NULL, "dpll_extdev_ck", "dpll_extdev_ck"), - DT_CLK(NULL, "dpll_extdev_m2_ck", "dpll_extdev_m2_ck"), - DT_CLK(NULL, "mux_synctimer32k_ck", "mux_synctimer32k_ck"), - DT_CLK(NULL, "synctimer_32kclk", "synctimer_32kclk"), - DT_CLK(NULL, "timer8_fck", "timer8_fck"), - DT_CLK(NULL, "timer9_fck", "timer9_fck"), - DT_CLK(NULL, "timer10_fck", "timer10_fck"), - DT_CLK(NULL, "timer11_fck", "timer11_fck"), - DT_CLK(NULL, "cpsw_50m_clkdiv", "cpsw_50m_clkdiv"), - DT_CLK(NULL, "cpsw_5m_clkdiv", "cpsw_5m_clkdiv"), - DT_CLK(NULL, "dpll_ddr_x2_ck", "dpll_ddr_x2_ck"), - DT_CLK(NULL, "dpll_ddr_m4_ck", "dpll_ddr_m4_ck"), - DT_CLK(NULL, "dpll_per_clkdcoldo", "dpll_per_clkdcoldo"), - DT_CLK(NULL, "dll_aging_clk_div", "dll_aging_clk_div"), - DT_CLK(NULL, "div_core_25m_ck", "div_core_25m_ck"), - DT_CLK(NULL, "func_12m_clk", "func_12m_clk"), - DT_CLK(NULL, "vtp_clk_div", "vtp_clk_div"), - DT_CLK(NULL, "usbphy_32khz_clkmux", "usbphy_32khz_clkmux"), DT_CLK("48300200.ehrpwm", "tbclk", "ehrpwm0_tbclk"), DT_CLK("48302200.ehrpwm", "tbclk", "ehrpwm1_tbclk"), DT_CLK("48304200.ehrpwm", "tbclk", "ehrpwm2_tbclk"), @@ -136,8 +52,8 @@ int __init am43xx_dt_clk_init(void) * By selecting dpll_core_m5_ck as the clocksource fixes this issue. * In AM335x dpll_core_m5_ck is the default clocksource. */ - clk1 = clk_get_sys(NULL, "cpsw_cpts_rft_clk"); - clk2 = clk_get_sys(NULL, "dpll_core_m5_ck"); + clk1 = ti_clk_get("cpsw_cpts_rft_clk"); + clk2 = ti_clk_get("dpll_core_m5_ck"); clk_set_parent(clk1, clk2); return 0;