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Fri, 17 Jun 2016 01:16:10 -0700 (MST) Received: from samsunx.samsung ([10.113.63.54]) by mmp1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O8W00K6UPMW2K00@mmp1.samsung.com>; Fri, 17 Jun 2016 17:16:10 +0900 (KST) From: Andi Shyti To: Chanwoo Choi Subject: [PATCH] clk: samsung: exynos5433: use clock_ignore_unused flag for SPI3 related clocks Date: Fri, 17 Jun 2016 17:16:02 +0900 Message-id: <1466151362-2881-1-git-send-email-andi.shyti@samsung.com> X-Mailer: git-send-email 2.8.1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrALMWRmVeSWpSXmKPExsWyRsSkRPfUxuRwg00LNCy2H3nGarH4x3Mm i+tfnrNa3PjVxmrx+oWhRf/j18wWmx5fY7X42HOP1eLyrjlsFjPO72OyuHjK1eLwm3ZWix9n ulksVu36w+jA5/H+Riu7x+W+XiaP60s+MXvsnHWX3WPTqk42j81L6j36tqxi9Pi8SS6AI4rL JiU1J7MstUjfLoErY+HN8oLj3BX319k1MH7j7GLk4JAQMJE48bqki5ETyBSTuHBvPVsXIxeH kMAKRon9L5azQCRMJObd2QqVWMoo8frkW2YI5yOjRMO/x2BVbAKaEk23f7CB2CICGhIz/15h BLGZBT4xS6x/Yw9iCwskSqxsXMkKYrMIqEp0np7NDmLzCrhKTP15hR1im5zE5ekPwLZJCBxj l5hy+QMTRIOAxLfJh1ggzpaV2HSAGaJeUuLgihssExgFFzAyrGIUTS1ILihOSi8y0itOzC0u zUvXS87P3cQIjIjT/5717WC8ecD6EKMAB6MSD++B0uRwIdbEsuLK3EOMpkAbJjJLiSbnA+Mu ryTe0NjMyMLUxNTYyNzSTEmcN0HqZ7CQQHpiSWp2ampBalF8UWlOavEhRiYOTqkGRu6b3w4z P4jwFVbVE+9bq1Rk1nU/v6pzz0vZv9fUMwWuTnrd0FN9Moxb51hlC4vcmkNJrovqzmsJqN35 LLQt6ogl38ozE98qiL2aa/p46p7usOigdPUwdaef8x0Vvk38q7HrwuzHB7foH2n+33J0VgyX /K6sck3Ju/sWhL0QVPTfYVP4Zm4rtxJLcUaioRZzUXEiAHmexg2DAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrHIsWRmVeSWpSXmKPExsVy+t9jAd1TG5PDDXYdlbPYfuQZq8XiH8+Z LK5/ec5qceNXG6vF6xeGFv2PXzNbbHp8jdXiY889VovLu+awWcw4v4/J4uIpV4vDb9pZLX6c 6WaxWLXrD6MDn8f7G63sHpf7epk8ri/5xOyxc9Zddo9NqzrZPDYvqffo27KK0ePzJrkAjqgG RpuM1MSU1CKF1Lzk/JTMvHRbJe/geOd4UzMDQ11DSwtzJYW8xNxUWyUXnwBdt8wcoLOVFMoS c0qBQgGJxcVK+naYJoSGuOlawDRG6PqGBMH1GBmggYQ1jBkLb5YXHOeuuL/OroHxG2cXIyeH hICJxLw7W9kgbDGJC/fWA9lcHEICSxklXp98ywzhfGSUaPj3mAWkik1AU6Lp9g+wDhEBDYmZ f68wgtjMAp+YJda/sQexhQUSJVY2rmQFsVkEVCU6T89mB7F5BVwlpv68wg6xTU7i8vQHbBMY uRcwMqxilEgtSC4oTkrPNcpLLdcrTswtLs1L10vOz93ECI67Z9I7GA/vcj/EKMDBqMTDGyCc HC7EmlhWXJl7iFGCg1lJhHfrOqAQb0piZVVqUX58UWlOavEhRlOgAyYyS4km5wNTQl5JvKGx iZmRpZG5oYWRsbmSOO/j/+vChATSE0tSs1NTC1KLYPqYODilGhiZTKV3Ld8zn+mPzz/jXQkh 5orfC6uahcr6pb4yxltdZF3VtW3/6fSQzr5L8vtXS2suDVXbcVG1c1m978RzmQ0v69aVbm81 f7j1qcmiep7TE3+vPVO+7qntLvU7sk+/er67ExozS8qh4kCzCt/KqmD7o3aM0n/jJ8uE9xwQ OFP/KaR9RhWfzF8lluKMREMt5qLiRADRYst60QIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160617_011633_209489_5D5D2C35 X-CRM114-Status: GOOD ( 11.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org, Andi Shyti , Michael Turquette , Stephen Boyd , Tomasz Figa , Andi Shyti , linux-kernel@vger.kernel.org, Jaehoon Chung , Kukjin Kim , Sylwester Nawrocki , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jaehoon Chung The SPI 3 bus uses two clocks, a bus clock and an input clock. Do not disable the clocks when unused in order to allow access to the SPI 3 device. Signed-off-by: Jaehoon Chung Signed-off-by: Andi Shyti --- drivers/clk/samsung/clk-exynos5433.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 128527b..7c1fa09 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -1641,11 +1641,12 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = { GATE(CLK_SCLK_IOCLK_SPI4, "sclk_ioclk_spi4", "ioclk_spi4_clk_in", ENABLE_SCLK_PERIC, 21, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_IOCLK_SPI3, "sclk_ioclk_spi3", "ioclk_spi3_clk_in", - ENABLE_SCLK_PERIC, 20, CLK_SET_RATE_PARENT, 0), + ENABLE_SCLK_PERIC, 20, + CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_SPI4, "sclk_spi4", "sclk_spi4_peric", ENABLE_SCLK_PERIC, 19, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_SPI3, "sclk_spi3", "sclk_spi3_peric", ENABLE_SCLK_PERIC, - 18, CLK_SET_RATE_PARENT, 0), + 18, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_SCI, "sclk_sci", "div_sclk_sci", ENABLE_SCLK_PERIC, 17, 0, 0), GATE(CLK_SCLK_SC_IN, "sclk_sc_in", "div_sclk_sc_in", ENABLE_SCLK_PERIC,