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[92.17.247.99]) by smtp.gmail.com with ESMTPSA id bf5sm11829355wjc.12.2016.06.21.10.24.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 21 Jun 2016 10:24:46 -0700 (PDT) From: Srinivas Kandagatla To: Andy Gross Subject: [PATCH v2 5/8] arm64: dts: db820c: add support to I2C on HS Date: Tue, 21 Jun 2016 18:22:46 +0100 Message-Id: <1466529769-2674-6-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1466529769-2674-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1466529769-2674-1-git-send-email-srinivas.kandagatla@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160621_102509_877524_CDF1DB95 X-CRM114-Status: GOOD ( 11.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, David Brown , Rob Herring , Srinivas Kandagatla , linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds support to i2c bus on High speed connector. Signed-off-by: Srinivas Kandagatla --- arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi index 3114710..aefbb64 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi @@ -19,6 +19,7 @@ serial1 = &blsp2_uart2; i2c0 = &blsp1_i2c2; i2c1 = &blsp2_i2c1; + i2c2 = &blsp2_i2c0; }; chosen { @@ -53,5 +54,11 @@ label = "LS-I2C1"; status = "okay"; }; + + i2c@075b5000 { + /* On High speed expansion */ + label = "HS-I2C2"; + status = "okay"; + }; }; };