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Mon, 27 Jun 2016 22:03:45 +0900 (KST) Received: from samsunx.samsung ([10.113.63.54]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O9F00BM8LM2K970@mmp2.samsung.com>; Mon, 27 Jun 2016 22:03:45 +0900 (KST) From: Andi Shyti To: Chanwoo Choi Subject: [PATCH v2 2/2] clk: exynos5433: enable sclk_ioclk for SPI3 Date: Mon, 27 Jun 2016 22:03:14 +0900 Message-id: <1467032594-7643-2-git-send-email-andi.shyti@samsung.com> X-Mailer: git-send-email 2.8.1 In-reply-to: <1467032594-7643-1-git-send-email-andi.shyti@samsung.com> References: <1467032594-7643-1-git-send-email-andi.shyti@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupikeLIzCtJLcpLzFFi42JZI2JSoGuoUhhusPGEjMX2I89YLRb/eM5k cf3Lc1aLG7/aWC1evzC06H/8mtli0+NrrBYfe+6xWlzeNYfNYsb5fUwWF0+5Whx+085q8eNM N4vFql1/GB34PN7faGX3uNzXy+RxfcknZo+ds+6ye2xa1cnmsXlJvUffllWMHp83yQVwRHHZ pKTmZJalFunbJXBlbFy9krVgO3fFnRMHmRsYL3F2MXJySAiYSFx78ZENwhaTuHBvPZDNxSEk sIJR4v2za6wwRRs2bmGBSMxilLjTc48dwvnIKLH9+WRmkCo2AU2Jpts/wEaJCGhIzPx7hRHE Zhb4xCzxsc8HxBYWcJaYcuIlWD2LgKrEh3c97CA2r4CrRMu7LnaIbXISl6c/AJrDwcEp4Cbx 71gdSFgIqGT770lgR0gIPGKXmHfmHQvEHAGJb5MPsYDUSwjISmw6wAwxRlLi4IobLBMYhRcw MqxiFE0tSC4oTkovMtQrTswtLs1L10vOz93ECIyi0/+e9e5gvH3A+hCjAAejEg+vhnxBuBBr YllxZe4hRlOgDROZpUST84GxmlcSb2hsZmRhamJqbGRuaaYkzqso9TNYSCA9sSQ1OzW1ILUo vqg0J7X4ECMTB6dUA+NWm2XfmG+FKn9dGjtdUVYq2GWx2fJrPBqHpF8EH6hRn6opc/us6ivO Thl2jttv9t6ty55ReebW+RVfe9Nfmt/msNuaxbQ3jttvqa7N9d/59dzRZk/aBCb7pjy8XqhW 1b1ZdGbGauvik0+iF3wrc5DTPF+slxSrwfYu5VD1g6kGwb0FRqI785RYijMSDbWYi4oTAQ4y LOKdAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrOIsWRmVeSWpSXmKPExsVy+t9jQV1DlcJwg3ULxSy2H3nGarH4x3Mm i+tfnrNa3PjVxmrx+oWhRf/j18wWmx5fY7X42HOP1eLyrjlsFjPO72OyuHjK1eLwm3ZWix9n ulksVu36w+jA5/H+Riu7x+W+XiaP60s+MXvsnHWX3WPTqk42j81L6j36tqxi9Pi8SS6AI6qB 0SYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ0sJcSSEvMTfVVsnFJ0DXLTMH6GwlhbLE nFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZoIGENY8bG1StZC7ZzV9w5cZC5gfESZxcj J4eEgInEho1bWCBsMYkL99azdTFycQgJzGKUuNNzjx3C+cgosf35ZGaQKjYBTYmm2z/YQGwR AQ2JmX+vMILYzAKfmCU+9vmA2MICzhJTTrwEq2cRUJX48K6HHcTmFXCVaHnXxQ6xTU7i8vQH QHM4ODgF3CT+HasDCQsBlWz/PYllAiPvAkaGVYwSqQXJBcVJ6bmGeanlesWJucWleel6yfm5 mxjBkfpMagfjwV3uhxgFOBiVeHgX2BaEC7EmlhVX5h5ilOBgVhLhXatUGC7Em5JYWZValB9f VJqTWnyI0RToronMUqLJ+cAkklcSb2hsYmZkaWRuaGFkbK4kzvv4/7owIYH0xJLU7NTUgtQi mD4mDk6pBsZgXam1ibsOm9c1+d1U9DpjJBAg7lTtNNtNQ0OhkT9NbuVrLx+pvKNh2jVLDi16 XiVyiYF9Jbt7oyT7wRbdFIMLrQ/fhd9eIJ6o/HbxjmdMkR32itdmPdKR65ow09iwdx7f5YiC eRplC9SXeXo5/7Hbsnq/D9eSrcf25j/7nHgz/EW/Oa+EqxJLcUaioRZzUXEiAOChX6jqAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160627_060408_782020_C7583529 X-CRM114-Status: GOOD ( 13.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org, Andi Shyti , Michael Turquette , Stephen Boyd , Tomasz Figa , Andi Shyti , linux-kernel@vger.kernel.org, Jaehoon Chung , Kukjin Kim , Sylwester Nawrocki , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP enable SPI3 iosclk by using the CLK_IS_CRITICAL flag. There is no device which is supposed to enable this clock when needed, therefore, the only way to use the SPI bus is to enable it in boot time. Suggested-by: Tomasz Figa Signed-off-by: Andi Shyti Signed-off-by: Jaehoon Chung Reviewed-by: Chanwoo Choi --- Hi, V1 -> V2 - the "sclk_spi3" doesn't need to be enabled in boot time as it is handled by the spi driver itself. - use the CLK_IS_CRITICAL flag for the ioclk Andi drivers/clk/samsung/clk-exynos5433.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index dcb4391..c33150e 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -1641,7 +1641,8 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = { GATE(CLK_SCLK_IOCLK_SPI4, "sclk_ioclk_spi4", "ioclk_spi4_clk_in", ENABLE_SCLK_PERIC, 21, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_IOCLK_SPI3, "sclk_ioclk_spi3", "ioclk_spi3_clk_in", - ENABLE_SCLK_PERIC, 20, CLK_SET_RATE_PARENT, 0), + ENABLE_SCLK_PERIC, 20, + CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_SPI4, "sclk_spi4", "sclk_spi4_peric", ENABLE_SCLK_PERIC, 19, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_SPI3, "sclk_spi3", "sclk_spi3_peric", ENABLE_SCLK_PERIC,