From patchwork Mon Jun 27 13:09:55 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sylvain Lemieux X-Patchwork-Id: 9200541 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4235260B16 for ; Mon, 27 Jun 2016 13:11:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 33EC52858D for ; Mon, 27 Jun 2016 13:11:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2893E28597; Mon, 27 Jun 2016 13:11:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RCVD_IN_SORBS_WEB, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D4A9228591 for ; Mon, 27 Jun 2016 13:11:56 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bHWJF-0003hz-Ps; Mon, 27 Jun 2016 13:10:41 +0000 Received: from mail-io0-x244.google.com ([2607:f8b0:4001:c06::244]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bHWJ1-0003Bj-Kj for linux-arm-kernel@lists.infradead.org; Mon, 27 Jun 2016 13:10:28 +0000 Received: by mail-io0-x244.google.com with SMTP id u25so23711335iou.2 for ; Mon, 27 Jun 2016 06:10:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2LPpzcWHVpFj/r/qe3OZpSz71i9cMLFp8stLysRggOE=; b=eMptYJQ1UWvkHCOK7JyYAjcmiZwE4FksKrgjyRo+8MMmMiFE1vy9kVBJIAigLPLI53 XlmqUd3kt1AmVCIpjVSzfzpzRgcaYp+EqCLiP69XY55nwcidMDx2bmKuLEOiMCWP0dB7 z9zMg53uXwx6DNOxnxTK/zmQ6PEnP89OMK1ZRC6KPwHfGX9nupiTVnKNiWahZ7VSQBDw QWEtfQ2c90S/nv9cnD5vVyI7maA9L18h4cW/ZIETQCU05S4GhVluCVSsuQ/TzXtabDDO zyGm9J3iYvWnPFTcmrT1QVddfTLa+bJjwY1c8gFhKYCXw4GXfCAFc3KV4Z9iDlh02gey CwuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2LPpzcWHVpFj/r/qe3OZpSz71i9cMLFp8stLysRggOE=; b=NQUDhoUaCe6xwhJuTAAibRY1GEqweEX85fLn0RRTzhjfvrwZjXEP54w3vx8g91+RgI OlWgm+CTsJVWvkGGJI2w5VA49tfuhRdEqCjBAOqVof9ggM4c17MXDOi1GlAdauDiNUFv r/FO9wswEwaW5kz/KnzZL3scM17Ovrl0N1I/Yzijoc3oVicJPWpAsENQ7Q7rm6yM/B/E aB6cyvfxGUgR3Y2NZLd2/tnvH8awMKhxvU6dEdsiONiy8br1z7QgsFTVNFZ55qcM22Fb vThV4XvCuRKe2F0PawZlSkqsHlWUhKRS38ipj6lqi7HaNdlJ6fbJSa5YIocrzjNcec2w ZYQg== X-Gm-Message-State: ALyK8tKOkYPEG2wr9Egli54XpPsDV+zGUHQaR6kLoHGuWl+3ylytvwpgVze/RrjLKTkLCQ== X-Received: by 10.107.144.86 with SMTP id s83mr643991iod.165.1467033006227; Mon, 27 Jun 2016 06:10:06 -0700 (PDT) Received: from CABRO3AP00510.americas.tsp.ad ([74.51.240.241]) by smtp.gmail.com with ESMTPSA id w101sm9365919ioi.12.2016.06.27.06.10.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Jun 2016 06:10:05 -0700 (PDT) From: Sylvain Lemieux To: vz@mleia.com, thierry.reding@gmail.com Subject: [PATCH v2 1/3] pwm: lpc32xx: Set PWM_PIN_LEVEL bit to default value Date: Mon, 27 Jun 2016 09:09:55 -0400 Message-Id: <1467032997-5340-2-git-send-email-slemieux.tyco@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1467032997-5340-1-git-send-email-slemieux.tyco@gmail.com> References: <1467032997-5340-1-git-send-email-slemieux.tyco@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160627_061027_796421_4E11953D X-CRM114-Status: GOOD ( 12.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sylvain Lemieux The PWM_PIN_LEVEL bit is leave unset by the kernel PWM driver. Prior to commit 08ee77b5a5de27ad63c92262ebcb4efe0da93b58, the PWM_PIN_LEVEL bit was always clear when the PWM was disable and a 0 logic level was apply to the output. According to the LPC32x0 User Manual [1], the default value for bit 30 (PWM_PIN_LEVEL) is 0. This change initialize the pin level to 0 (default value) and update the register value accordingly. [1] http://www.nxp.com/documents/user_manual/UM10326.pdf Signed-off-by: Sylvain Lemieux --- Changes from v1 to v2: * Only setup the "PWMx_PIN_LEVEL" once on probe. drivers/pwm/pwm-lpc32xx.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c index 4d470c1..a9b3cff 100644 --- a/drivers/pwm/pwm-lpc32xx.c +++ b/drivers/pwm/pwm-lpc32xx.c @@ -25,6 +25,7 @@ struct lpc32xx_pwm_chip { }; #define PWM_ENABLE BIT(31) +#define PWM_PIN_LEVEL BIT(30) #define to_lpc32xx_pwm_chip(_chip) \ container_of(_chip, struct lpc32xx_pwm_chip, chip) @@ -103,6 +104,7 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev) struct lpc32xx_pwm_chip *lpc32xx; struct resource *res; int ret; + u32 val; lpc32xx = devm_kzalloc(&pdev->dev, sizeof(*lpc32xx), GFP_KERNEL); if (!lpc32xx) @@ -128,6 +130,11 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev) return ret; } + /* When PWM is disable, configure the output to the default value */ + val = readl(lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2)); + val &= ~PWM_PIN_LEVEL; + writel(val, lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2)); + platform_set_drvdata(pdev, lpc32xx); return 0;