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Mon, 27 Jun 2016 19:41:28 -0700 (MST) Received: from samsunx.samsung ([10.113.63.54]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O9G00A9QNH1H050@mmp2.samsung.com>; Tue, 28 Jun 2016 11:41:28 +0900 (KST) From: Andi Shyti To: Kukjin Kim , Krzysztof Kozlowski , Mark Brown Subject: [PATCH v2 1/5] spi: s3c64xx: group the CS signalling writes in a single function Date: Tue, 28 Jun 2016 11:41:11 +0900 Message-id: <1467081676-8442-2-git-send-email-andi.shyti@samsung.com> X-Mailer: git-send-email 2.8.1 In-reply-to: <1467081676-8442-1-git-send-email-andi.shyti@samsung.com> References: <1467081676-8442-1-git-send-email-andi.shyti@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrFLMWRmVeSWpSXmKPExsWyRsSkUPfm48Jwg5sT2Sy2H3nGarH4x3Mm i6kPn7BZ3PjVxmrx+oWhRf/j18wWmx5fY7W4vGsOm8WM8/uYLBo/3mR34PK4vuQTs8emVZ1s HpuX1Hv0bVnF6PF5k1wAaxSXTUpqTmZZapG+XQJXRuPMXsaCHaIV39ZOYG1gnCvUxcjJISFg IrF4zg52CFtM4sK99WxdjFwcQgIrGCW+7V7MBlP0dHMPK0RiFqPErlvzoKo+Mko0fr7AAlLF JqAp0XT7B1iHiECxxJOr/8E6mAW+MUosODmRESQhLBAtceTYN2YQm0VAVWLTum1gu3kFXCXa X01lgVgnJ3F5+gOwQZwCbhI79p1iBbGFgGrWz1oGNlRCYBO7xNvWA1CDBCS+TT4E1MwBlJCV 2AQRlhCQlDi44gbLBEbhBYwMqxhFUwuSC4qT0osM9YoTc4tL89L1kvNzNzECo+D0v2e9Oxhv H7A+xCjAwajEw3thcmG4EGtiWXFl7iFGU6ANE5mlRJPzgbGWVxJvaGxmZGFqYmpsZG5ppiTO qyj1M1hIID2xJDU7NbUgtSi+qDQntfgQIxMHp1QD45VYCWWvtV36ET/XPubffP6GsYb0C8H9 P+K+bZ45Ld0nRDWlsY5/z98et82fjq59cmyPjJl9zHW+e4sL4v9NedC2a9EjiRUe1x3t77N3 PddJd27VjV+aGOrl/K8+WfgAy2G3xONXWdY/bZzeL+z2fcmMQ1qzrqZeu842+U/UxnW1SeuU Zqz/kKbEUpyRaKjFXFScCABrJNESfQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrOIsWRmVeSWpSXmKPExsVy+t9jQd0bjwvDDT68VLLYfuQZq8XiH8+Z LKY+fMJmceNXG6vF6xeGFv2PXzNbbHp8jdXi8q45bBYzzu9jsmj8eJPdgcvj+pJPzB6bVnWy eWxeUu/Rt2UVo8fnTXIBrFENjDYZqYkpqUUKqXnJ+SmZeem2St7B8c7xpmYGhrqGlhbmSgp5 ibmptkouPgG6bpk5QEcpKZQl5pQChQISi4uV9O0wTQgNcdO1gGmM0PUNCYLrMTJAAwlrGDMa Z/YyFuwQrfi2dgJrA+NcoS5GTg4JAROJp5t7WCFsMYkL99azdTFycQgJzGKU2HVrHpTzkVGi 8fMFFpAqNgFNiabbP9hAbBGBYoknV/+zghQxC3xjlFhwciIjSEJYIFriyLFvzCA2i4CqxKZ1 29hBbF4BV4n2V1NZINbJSVye/gBsEKeAm8SOfafAzhACqlk/axnrBEbeBYwMqxglUguSC4qT 0nON8lLL9YoTc4tL89L1kvNzNzGCI+2Z9A7Gw7vcDzEKcDAq8fBemFwYLsSaWFZcmXuIUYKD WUmEN+sRUIg3JbGyKrUoP76oNCe1+BCjKdBhE5mlRJPzgUkgryTe0NjEzMjSyNzQwsjYXEmc 9/H/dWFCAumJJanZqakFqUUwfUwcnFINjMnvV6ptb/M4Va4cemXhrfrC4mnl3LlRbpkV17h7 6lvF5tu2eq/KjnTbwDP7CrNvVtjE7QwyS/jd9my9cdilvD5h2+tW/51PHd/orKvsjXq6X6rr 57p7gbZ+N46f3Td131L3qQmhTvsqmaaFvH1UFJw36crOaxKaTC2BP2OWnj6hlPbu9veWF0os xRmJhlrMRcWJAJOdZwfKAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160627_194152_480181_E1FF431C X-CRM114-Status: GOOD ( 15.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Andi Shyti , linux-spi@vger.kernel.org, Jaehoon Chung , Andi Shyti , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP To enable/disable the CS line, the driver performs a writel in the S3C64XX_SPI_SLAVE_SEL registers. Group the register's configuration in a single function. Signed-off-by: Andi Shyti --- drivers/spi/spi-s3c64xx.c | 36 ++++++++++++++++++++++++++---------- 1 file changed, 26 insertions(+), 10 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 5a76a50..972367d 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -310,6 +310,28 @@ static void prepare_dma(struct s3c64xx_spi_dma_data *dma, dma_async_issue_pending(dma->ch); } +static void s3c64xx_spi_set_cs(struct spi_device *spi, bool enable) +{ + struct s3c64xx_spi_driver_data *sdd = + spi_master_get_devdata(spi->master); + + if (enable) { + if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) { + writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL); + } else { + u32 ssel = readl(sdd->regs + S3C64XX_SPI_SLAVE_SEL); + + ssel |= (S3C64XX_SPI_SLAVE_AUTO | + S3C64XX_SPI_SLAVE_NSC_CNT_2); + writel(ssel, sdd->regs + S3C64XX_SPI_SLAVE_SEL); + } + } else { + if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) + writel(S3C64XX_SPI_SLAVE_SIG_INACT, + sdd->regs + S3C64XX_SPI_SLAVE_SEL); + } +} + static int s3c64xx_spi_prepare_transfer(struct spi_master *spi) { struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi); @@ -706,12 +728,7 @@ static int s3c64xx_spi_transfer_one(struct spi_master *master, enable_datapath(sdd, spi, xfer, use_dma); /* Start the signals */ - if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) - writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL); - else - writel(readl(sdd->regs + S3C64XX_SPI_SLAVE_SEL) - | S3C64XX_SPI_SLAVE_AUTO | S3C64XX_SPI_SLAVE_NSC_CNT_2, - sdd->regs + S3C64XX_SPI_SLAVE_SEL); + s3c64xx_spi_set_cs(spi, true); spin_unlock_irqrestore(&sdd->lock, flags); @@ -861,16 +878,15 @@ static int s3c64xx_spi_setup(struct spi_device *spi) pm_runtime_mark_last_busy(&sdd->pdev->dev); pm_runtime_put_autosuspend(&sdd->pdev->dev); - if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) - writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL); + s3c64xx_spi_set_cs(spi, false); + return 0; setup_exit: pm_runtime_mark_last_busy(&sdd->pdev->dev); pm_runtime_put_autosuspend(&sdd->pdev->dev); /* setup() returns with device de-selected */ - if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) - writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL); + s3c64xx_spi_set_cs(spi, false); if (gpio_is_valid(spi->cs_gpio)) gpio_free(spi->cs_gpio);