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Tue, 12 Jul 2016 19:02:27 +0900 (KST) Received: from samsunx.samsung ([10.113.63.54]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OA7009HH57YEU50@mmp2.samsung.com>; Tue, 12 Jul 2016 19:02:26 +0900 (KST) From: Andi Shyti To: Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Mark Brown , Sylwester Nawrocki , Tomasz Figa , Michael Turquette , Stephen Boyd Subject: [PATCH v3 5/7] spi: s3c64xx: add Exynos5433 compatible for ioclk handling Date: Tue, 12 Jul 2016 19:02:14 +0900 Message-id: <1468317736-18841-6-git-send-email-andi.shyti@samsung.com> X-Mailer: git-send-email 2.8.1 In-reply-to: <1468317736-18841-1-git-send-email-andi.shyti@samsung.com> References: <1468317736-18841-1-git-send-email-andi.shyti@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrGIsWRmVeSWpSXmKPExsWyRsSkUNf4QEu4weU2EYvtR56xWiz+8ZzJ YurDJ2wW1788Z7WYf+Qcq8WNX22sFq9fGFr0P37NbLHp8TVWi48991gtZpzfx2TR+PEmu8XS 6xeZLC6ecrVo3XuE3eLwm3ZWix9nulksVu36w+gg5LFm3hpGj/c3Wtk9Lvf1MnlcX/KJ2WPn rLvsHptWdbJ5bF5S79G3ZRWjx+dNcgGcUVw2Kak5mWWpRfp2CVwZj450shV8U6/YdvcycwPj NIUuRk4OCQETiS1LzjBC2GISF+6tZ+ti5OIQEljBKLFr0wd2mKLFHfcZIRKzGCUmP2mDcj4y Smz+eYMJpIpNQFOi6fYPsHYRgWdMEh8aXoNVMQtsZ5I49nQtK0iVsECIxJSJM8AWsgioSmx8 eA4szivgJvH30RyoQ+QkLk9/wAZicwq4S0xuXQm2QQioZt7rHawgQyUEOjkkdi07xQwxSEDi 2+RDLF2MHEAJWYlNB5gh5khKHFxxg2UCo/ACRoZVjKKpBckFxUnpRYZ6xYm5xaV56XrJ+bmb GIHRd/rfs94djLcPWB9iFOBgVOLh7TjZHC7EmlhWXJl7iNEUaMNEZinR5HxgjOeVxBsamxlZ mJqYGhuZW5opifMqSv0MFhJITyxJzU5NLUgtii8qzUktPsTIxMEp1cCYdyCAQ9b8VchEvs7Q BRwpXXUMkhue7jzFGZbgqTF70un8v03ff244xLH39jqN/YzXhfYc1/suOlXk97yzTG27N8r0 n1ru/n31jya/VxzTyp/YCumsSZz4byv/7Z7mX8smMjWmZ2UmP5fwaZd8dG7r61kNGSmex5bl bQqMLXqdPe+srOivHuYrSizFGYmGWsxFxYkA7DnzLLkCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrMIsWRmVeSWpSXmKPExsVy+t9jQV3jAy3hBpc2slhsP/KM1WLxj+dM FlMfPmGzuP7lOavF/CPnWC1u/GpjtXj9wtCi//FrZotNj6+xWnzsucdqMeP8PiaLxo832S2W Xr/IZHHxlKtF694j7BaH37SzWvw4081isWrXH0YHIY8189Ywery/0crucbmvl8nj+pJPzB47 Z91l99i0qpPNY/OSeo++LasYPT5vkgvgjGpgtMlITUxJLVJIzUvOT8nMS7dV8g6Od443NTMw 1DW0tDBXUshLzE21VXLxCdB1y8wB+kdJoSwxpxQoFJBYXKykb4dpQmiIm64FTGOErm9IEFyP kQEaSFjDmPHoSCdbwTf1im13LzM3ME5T6GLk5JAQMJFY3HGfEcIWk7hwbz1bFyMXh5DALEaJ yU/aGCGcj4wSm3/eYAKpYhPQlGi6/QOsSkTgGZPEh4bXYFXMAtuZJI49XcsKUiUsECIxZeIM sLksAqoSGx+eA4vzCrhJ/H00B2qfnMTl6Q/YQGxOAXeJya0rwTYIAdXMe72DdQIj7wJGhlWM EqkFyQXFSem5hnmp5XrFibnFpXnpesn5uZsYwRH+TGoH48Fd7ocYBTgYlXh4F5S0hAuxJpYV V+YeYpTgYFYS4b2yFyjEm5JYWZValB9fVJqTWnyI0RTosInMUqLJ+cDkk1cSb2hsYmZkaWRu aGFkbK4kzvv4/7owIYH0xJLU7NTUgtQimD4mDk6pBkZNkQSNvM3P8woZP1lqe33TMTCeYJ4o 7tG/PLTw74fUNeWRTzUsKgQ4Ns65r+zdda52z5Mg6yNCK9IuVbt9jZ2tdOFo8svPITyv+C5/ 2++xkPvc5qeOVafEHty+eONst/HGjAt6bgc+nmnYfsrtxsuKFUyzdK6VM90OuneEa12EQ9YL 1uxbSWuVWIozEg21mIuKEwH3BnAQBgMAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160712_030250_354206_0FB4E5B3 X-CRM114-Status: GOOD ( 19.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, Andi Shyti , linux-spi@vger.kernel.org, Jaehoon Chung , Chanwoo Choi , Andi Shyti , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The new compatible is related to the Samsung Exynos5433 SoC. The difference between the previous is that in the exynos5433 the SPI controller is driven by three clocks instead of only one. The new clock (ioclk) is controlling the input/output clock whenever the controller is slave or master. The presence of the clock line is detected from the compatibility structure (exynos5433_spi_port_config) as a boolean value. The probe function checks whether the ioclk is present and if so, it acquires. The runtime suspend and resume functions will handle the clock enabling and disabling as well. Signed-off-by: Andi Shyti Reviewed-by: Michael Turquette Reviewed-by: Krzysztof Kozlowski --- drivers/spi/spi-s3c64xx.c | 57 ++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 52 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 3a65adf..6da663f 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -156,12 +156,14 @@ struct s3c64xx_spi_port_config { int quirks; bool high_speed; bool clk_from_cmu; + bool clk_ioclk; }; /** * struct s3c64xx_spi_driver_data - Runtime info holder for SPI driver. * @clk: Pointer to the spi clock. * @src_clk: Pointer to the clock used to generate SPI signals. + * @ioclk: Pointer to the i/o clock between master and slave * @master: Pointer to the SPI Protocol master. * @cntrlr_info: Platform specific data for the controller this driver manages. * @tgl_spi: Pointer to the last CS left untoggled by the cs_change hint. @@ -181,6 +183,7 @@ struct s3c64xx_spi_driver_data { void __iomem *regs; struct clk *clk; struct clk *src_clk; + struct clk *ioclk; struct platform_device *pdev; struct spi_master *master; struct s3c64xx_spi_info *cntrlr_info; @@ -1147,6 +1150,21 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) goto err_disable_clk; } + if (sdd->port_conf->clk_ioclk) { + sdd->ioclk = devm_clk_get(&pdev->dev, "spi_ioclk"); + if (IS_ERR(sdd->ioclk)) { + dev_err(&pdev->dev, "Unable to acquire 'ioclk'\n"); + ret = PTR_ERR(sdd->ioclk); + goto err_disable_src_clk; + } + + ret = clk_prepare_enable(sdd->ioclk); + if (ret) { + dev_err(&pdev->dev, "Couldn't enable clock 'ioclk'\n"); + goto err_disable_src_clk; + } + } + pm_runtime_set_autosuspend_delay(&pdev->dev, AUTOSUSPEND_TIMEOUT); pm_runtime_use_autosuspend(&pdev->dev); pm_runtime_set_active(&pdev->dev); @@ -1193,6 +1211,8 @@ err_pm_put: pm_runtime_disable(&pdev->dev); pm_runtime_set_suspended(&pdev->dev); + clk_disable_unprepare(sdd->ioclk); +err_disable_src_clk: clk_disable_unprepare(sdd->src_clk); err_disable_clk: clk_disable_unprepare(sdd->clk); @@ -1211,6 +1231,8 @@ static int s3c64xx_spi_remove(struct platform_device *pdev) writel(0, sdd->regs + S3C64XX_SPI_INT_EN); + clk_disable_unprepare(sdd->ioclk); + clk_disable_unprepare(sdd->src_clk); clk_disable_unprepare(sdd->clk); @@ -1269,6 +1291,7 @@ static int s3c64xx_spi_runtime_suspend(struct device *dev) clk_disable_unprepare(sdd->clk); clk_disable_unprepare(sdd->src_clk); + clk_disable_unprepare(sdd->ioclk); return 0; } @@ -1279,17 +1302,28 @@ static int s3c64xx_spi_runtime_resume(struct device *dev) struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); int ret; + if (sdd->port_conf->clk_ioclk) { + ret = clk_prepare_enable(sdd->ioclk); + if (ret != 0) + return ret; + } + ret = clk_prepare_enable(sdd->src_clk); if (ret != 0) - return ret; + goto err_disable_ioclk; ret = clk_prepare_enable(sdd->clk); - if (ret != 0) { - clk_disable_unprepare(sdd->src_clk); - return ret; - } + if (ret != 0) + goto err_disable_src_clk; return 0; + +err_disable_src_clk: + clk_disable_unprepare(sdd->src_clk); +err_disable_ioclk: + clk_disable_unprepare(sdd->ioclk); + + return ret; } #endif /* CONFIG_PM */ @@ -1345,6 +1379,16 @@ static struct s3c64xx_spi_port_config exynos7_spi_port_config = { .quirks = S3C64XX_SPI_QUIRK_CS_AUTO, }; +static struct s3c64xx_spi_port_config exynos5433_spi_port_config = { + .fifo_lvl_mask = { 0x1ff, 0x7f, 0x7f, 0x7f, 0x7f, 0x1ff}, + .rx_lvl_offset = 15, + .tx_st_done = 25, + .high_speed = true, + .clk_from_cmu = true, + .clk_ioclk = true, + .quirks = S3C64XX_SPI_QUIRK_CS_AUTO, +}; + static const struct platform_device_id s3c64xx_spi_driver_ids[] = { { .name = "s3c2443-spi", @@ -1375,6 +1419,9 @@ static const struct of_device_id s3c64xx_spi_dt_match[] = { { .compatible = "samsung,exynos7-spi", .data = (void *)&exynos7_spi_port_config, }, + { .compatible = "samsung,exynos5433-spi", + .data = (void *)&exynos5433_spi_port_config, + }, { }, }; MODULE_DEVICE_TABLE(of, s3c64xx_spi_dt_match);