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Mon, 18 Jul 2016 11:10:44 +0000 From: Li Jun To: , , Subject: [PATCH 3/4] ARM: dts: imx7d-sdb: Set OTG2 oc polarity to be active low Date: Mon, 18 Jul 2016 19:15:46 +0800 Message-ID: <1468840547-17899-3-git-send-email-jun.li@nxp.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1468840547-17899-1-git-send-email-jun.li@nxp.com> References: <1468840547-17899-1-git-send-email-jun.li@nxp.com> MIME-Version: 1.0 X-Originating-IP: [192.158.241.86] X-ClientProxiedBy: SG2PR06CA0028.apcprd06.prod.outlook.com (10.163.105.38) To HE1PR04MB2140.eurprd04.prod.outlook.com (10.166.76.12) X-MS-Office365-Filtering-Correlation-Id: c35c0bcf-6e98-49bd-f350-08d3aefc2cd8 X-Microsoft-Exchange-Diagnostics: 1; HE1PR04MB2140; 2:7Smeu8g5PBJuhgjO9R4zIwKk2LA8v0dExrOJBQ4dBwTfyBNydhpjkuVGm7nFIpsXNW7psayn1KQMcbSrmzoAEGg0p3jux6wpXtgISAoM7xRVUMuCYEjuGCqKStU0mckD90OB5w43BPPZgdLVSfGoMlyuEmmAOBCeLkFSnAJLM+J/SOVQDco7udwtZsMWtbum; 3:rJZWoIZt8jlK+jGsssCzp5oWu4sMWD022uHdDYcLnU61PkDXn3y57btwZGxZASani2NKC44FhBdo093aPK4fSGCSC6aiqvS43uiQMiH8Jvdpn8kam+YPtwLaTbxGMVVG; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Li Jun Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Set OTG2 over current flag to be active low, OTG1 OC is not used by default. Signed-off-by: Li Jun --- arch/arm/boot/dts/imx7d-sdb.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts index b267f79..44ed399 100644 --- a/arch/arm/boot/dts/imx7d-sdb.dts +++ b/arch/arm/boot/dts/imx7d-sdb.dts @@ -287,7 +287,9 @@ &usbotg2 { vbus-supply = <®_usb_otg2_vbus>; + pinctrl-0 = <&pinctrl_usbotg2>; dr_mode = "host"; + over-current-polarity = <0>; status = "okay"; }; @@ -415,6 +417,12 @@ >; }; + pinctrl_usbotg2: usbotg2grp { + fsl,pins = < + MX7D_PAD_GPIO1_IO06__USB_OTG2_OC 0x59 + >; + }; + pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX7D_PAD_SD1_CMD__SD1_CMD 0x59